Bi-endian Processor Data Transfer via Memory Flow Controller
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Solution Overview
Problem
Computer systems face challenges in data communication due to differing data representations, particularly in handling 'endian-ness' and preferred slots, which can lead to misinterpretation and require complex multiplexers, increasing design complexity, space, and delay.
Innovation Solution
A bi-endian processor system that transposes words within data lines when transferring between processors using different data representations, eliminating the need for multiplexers by ensuring preferred slots are consistently positioned, thereby simplifying data handling and reducing delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiplexers are incorporated into the processor design to handle changing preferred slot positions, then the processor can accommodate both big-endian and little-endian data sources, but the device complexity increases
Solution Approach 1:
The patent applies preliminary action by performing endian conversion and preferred slot positioning during the data transfer phase before data processing begins. The memory flow controller pre-positions data words in the correct slots based on the source endian-ness, so that the processor core receives data already in the proper format without needing complex multiplexers to dynamically switch between configurations.
2Adaptability or versatility
If multiplexers are used to handle preferred slot data, then the processor can support multiple data representations, but the space required for the processor increases
Solution Approach 1:
The patent extracts the endian conversion and preferred slot positioning functionality from the processor core and places it in the memory flow controller. This separation removes the need for multiplexers within the processor core, reducing the processor's space requirements while maintaining the ability to support both big-endian and little-endian data representations through the external memory flow controller.
3Adaptability or versatility
If multiplexers are incorporated to handle endian conversion, then the processor can read from different data source configurations, but the delay in accessing preferred slot data increases
Solution Approach 1:
The memory flow controller performs preliminary action by pre-converting the endian format and pre-positioning data in the correct preferred slots during the data transfer phase. This eliminates the need for time-consuming multiplexer switching during data processing, as the processor core receives data already in the correct format and position, thereby reducing data access delay.
4Adaptability or versatility
If multiplexers are used to handle preferred slot positions, then the processor can accommodate changing data representations, but the maximum operating speed of the processor is limited
Solution Approach 1:
The patent extracts the endian conversion and preferred slot positioning operations from the processor core's critical path and relocates them to the memory flow controller. This removal of multiplexers from the processor core eliminates the speed limitations they impose, allowing the processor to operate at maximum speed while the memory flow controller handles the adaptable data representation conversion in parallel.
Data Source
AI summary
A bi-endian multiprocessor system having multiple processing elements, each of which includes a processor core, a local memory and a memory flow controller. The memory flow controller transfers data between the local memory and data sources external to the processing element. If the processing element and the data source implement data representations having the same endian-ness, each multi-word line of data is stored in the local memory in the same word order as in the data source. If the processing element and the data source implement data representations having different endian-ness, the words of each multi-word line of data are transposed when data is transferred between local memory and the data source. The processing element may incorporate circuitry to add doublewords, wherein the circuitry can alternately carry bits from a first word to a second word or vice versa, depending upon whether the words in lines of data are transposed.