Bi-layer Underfill Mask for Plasma Wafer Dicing
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Solution Overview
Problem
Current methods for dicing semiconductor wafers, such as scribing and sawing, result in chipping and cracking, leading to waste of wafer real estate and additional spacing requirements, while plasma dicing faces limitations like high costs and production issues with metals like copper.
Innovation Solution
A method involving a pre-patterned or un-patterned bi-layer wafer-level underfill material stack is applied to the semiconductor wafer, followed by plasma etching to form trenches and singulate integrated circuits, with an upper layer protecting the circuits during etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If scribing or sawing is used to dice semiconductor wafers, then the wafer can be separated into individual dice, but chipping and cracking occur along the severed edges
Solution Approach 1:
The patent replaces mechanical dicing methods (scribing with diamond tips, sawing with rotating blades) with a chemical etching process using plasma. The plasma selectively removes material along predetermined streets to form trenches, eliminating mechanical contact that causes chipping and cracking. This substitution of mechanical action with chemical reaction resolves the contradiction between achieving separation and maintaining edge integrity.
Solution Approach 2:
The patent changes the physical and chemical parameters of the dicing process by using controlled plasma etching conditions (gas composition, power, pressure, temperature) to achieve precise material removal. By controlling these parameters, the process creates clean, controlled trenches without the mechanical stress that causes damage, thereby improving edge integrity while maintaining productivity.
2Reliability
If additional spacing is required between dice to prevent damage from chipping and cracking, then integrated circuit reliability is improved, but wafer real estate is wasted
Solution Approach 1:
By replacing mechanical dicing with plasma etching, the patent eliminates the need for protective spacing. The chemical process creates precise, clean trenches that do not generate chipping or cracking, allowing dice to be placed closer together without risking edge damage. This resolves the contradiction between reliability and area utilization.
Solution Approach 2:
The plasma etching process uses controlled gas flow (pneumatic element) to deliver reactive species that selectively etch material. This controlled chemical delivery system enables precise trench formation with minimal lateral damage, allowing tighter pitch between dice while maintaining circuit protection.
3Productivity
If a saw blade is used for dicing, then thick wafers can be separated, but three to five hundred microns must separate the circuitry to prevent damage
Solution Approach 1:
The patent replaces the mechanical saw blade with a plasma etching process that can handle thick wafers without requiring large safety margins. The plasma process etches vertically through the wafer thickness with precise control, creating clean trenches without the lateral force and vibration that cause chipping. This enables tight spacing even for thick wafers, resolving the contradiction between processing capability and area utilization.
Solution Approach 2:
The patent changes the dicing mechanism from mechanical cutting to controlled chemical etching with adjustable parameters (gas flow, power, pressure, etch time). These parameter controls enable precise depth and width management of trenches through thick wafers without requiring excessive spacing, thereby improving wafer real estate utilization while maintaining thick wafer processing capability.
4Reliability
If plasma dicing is implemented, then chipping and cracking are reduced, but cost increases due to lithography operations
Solution Approach 1:
The patent makes the wafer-level underfill material serve multiple functions: it acts as both the underfill substance that fills trenches after dicing and as the etch mask that defines the trench locations. This eliminates the need for separate lithography and mask application steps, reducing manufacturing cost while maintaining the reliability benefits of plasma dicing.
Solution Approach 2:
The patent combines the underfill material application and etch mask formation into a single step by using the underfill material itself as the mask. This merging of functions eliminates redundant processing steps (separate lithography, separate mask application), thereby reducing cost while preserving the precise trench formation that prevents chipping and cracking.
5Manufacturing precision
If plasma processing is used for dicing, then precise trench formation is achieved, but production issues occur with metals like copper
Solution Approach 1:
The patent applies local quality by making the underfill material composition vary by location: it has different etch selectivity characteristics in different regions to protect metal interconnects during plasma etching. The material is formulated to be resistant to plasma attack in areas with metal while allowing controlled etching in street regions, thereby maintaining both precision and production compatibility.
Solution Approach 2:
The patent uses a composite underfill material containing multiple components with different properties: one component provides etch resistance to protect copper and other metals from plasma damage, while another component allows controlled etching in street areas. This composite structure enables precise trench formation without compromising production throughput by damaging metal interconnects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces chipping and cracking, allows for closer spacing of integrated circuits, and addresses the limitations of plasma dicing by ensuring reliable separation and minimizing material loss during the dicing process.
Implementation Method 1
An upper layer of the pre-patterned bi-layer wafer-level underfill material stack protects the integrated circuits during the plasma etching
Implementation Method 2
plasma etching to form trenches in the semiconductor wafer in alignment with the dicing streets to singulate the integrated circuits
Data Source
AI summary
Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having integrated circuits on a front side thereof involves laminating a pre-patterned bi-layer wafer-level underfill material stack on the integrated circuits of the semiconductor wafer. The pre-patterned bi-layer wafer-level underfill material stack has regions corresponding to the integrated circuits and gaps corresponding to dicing streets between the integrated circuits. The method also involves plasma etching to form trenches in the semiconductor wafer in alignment with the dicing streets to singulate the integrated circuits. An upper layer of the pre-patterned bi-layer wafer-level underfill material stack protects the integrated circuits during the plasma etching.