Bias-Adjusted Power Amplifier Circuit for Stable RF Linearity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Power amplifier circuits face challenges in maintaining linearity and reducing distortion of RF signals, particularly when power supply potentials change, leading to variations in gain that affect the amplification efficiency and signal quality.
Innovation Solution
A power amplifier circuit design that includes a first bias circuit, a second bias circuit, a power amplifier with two transistors connected via a capacitor, and an adjustment circuit that adjusts currents based on changing power supply potentials to maintain consistent gain and reduce distortion, utilizing inductors and capacitors to manage DC and AC signals effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the power supply potential is lowered to reduce power consumption, then power consumption decreases, but the gain becomes larger than the set gain causing non-linear operation and increased distortion
Solution Approach 1:
The adjustment circuit monitors the power supply potential and dynamically adjusts the bias current to the second transistor accordingly. When the power supply potential decreases, the adjustment circuit reduces the bias current to compensate for the gain increase, maintaining constant gain and linear operation across varying power supply conditions
Solution Approach 2:
The bias current supplied to the second transistor is made dynamic rather than fixed. The adjustment circuit continuously adapts the bias current based on the instantaneous power supply potential, enabling the amplifier to maintain optimal performance characteristics across a range of power consumption levels
2Power
If the gain is increased to amplify weak signals, then signal amplification improves, but distortion increases when the power supply potential is low
Solution Approach 1:
The adjustment circuit provides feedback control by sensing the power supply potential and automatically adjusting the bias current to maintain constant gain. This prevents the gain from becoming excessively large at low power supply potentials, thereby suppressing distortion while preserving signal amplification capability
3Use of energy by moving object
If envelope tracking power supply is used to reduce power consumption, then power efficiency improves, but gain dispersion occurs due to gain variations with power supply potential changes
Solution Approach 1:
The adjustment circuit implements feedback control that continuously monitors the envelope tracking power supply potential and adjusts the bias current to the second transistor in real-time. This compensates for the correlation between power supply potential and gain, eliminating gain dispersion and maintaining consistent amplification characteristics across the entire power supply range
Solution Approach 2:
The bias current parameter is dynamically changed based on the power supply potential. By adjusting this parameter in response to power supply variations, the system maintains constant gain despite changes in power supply conditions, thereby resolving the gain dispersion issue
Data Source
AI summary
A power amplifier circuit includes a power amplifier including a first transistor having a first terminal connected to a reference potential, a second terminal to which a first current and a radio-frequency signal are input, and a third terminal connected to a first power supply potential via a first inductor; a capacitor connected to the third terminal of the first transistor; a second transistor including a first terminal connected to the capacitor and the reference potential via a second inductor, a second terminal to which a second current is input and is connected to the reference potential, and a third terminal connected to the first power supply potential via a third inductor and outputs signal; and an adjustment circuit that outputs a third current corresponding to the first power supply potential or a second power supply potential to the second terminal of the second transistor.