Power Amplifier Bias Circuit Using Capacitive Negative-Current Bypass
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Solution Overview
Problem
The linearity of gain in power amplification modules is degraded due to the cutting of negative bias current, which is exacerbated by reducing the current supply or increasing the size of transistors, leading to increased current consumption and difficulty in controlling gain.
Innovation Solution
A power amplification module with a bias circuit that includes a first bipolar transistor connected base to collector, a second bipolar transistor with collector connected to the emitter of the first, a third bipolar transistor with base connected to the first and emitter connected to a resistor, and a capacitor between the base and emitter, allowing the bias current to bypass negative current, thereby suppressing the increase in average bias current and maintaining linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the current supply Ibias is reduced to improve power efficiency, then power consumption decreases, but the linearity of gain is degraded due to negative bias current cutting
Solution Approach 1:
A capacitor is introduced as an intermediary element connected to the bias circuit. This capacitor provides a bypass path for negative bias current, preventing it from being cut by the PN junction. By adding this intermediary component, the system can maintain low power consumption while preserving gain linearity, as the capacitor allows negative current to flow without affecting the average bias current level.
2Reliability
If the size of transistors Q2 and Q3 is increased to suppress negative bias current cutting, then linearity of gain is improved, but current consumption increases
Solution Approach 1:
Instead of increasing transistor sizes to handle negative current, a capacitor is introduced as a more efficient intermediary. The capacitor provides a dedicated bypass path for negative bias current, allowing the transistors to maintain their original, smaller sizes while still preventing negative current cutting. This resolves the contradiction by achieving improved linearity without the penalty of increased current consumption.
3Adaptability or versatility
If the current supply Ibias is reduced to enable gain control, then variable gain amplification is achieved, but linearity degradation becomes significant
Solution Approach 1:
The capacitor acts as an intermediary that enables variable gain amplification while maintaining linearity. By providing a bypass path for negative bias current, the capacitor allows the bias current to be reduced for gain control purposes without suffering from negative current cutting. This means the system can achieve adaptability through variable gain while the capacitor ensures reliability by preventing linearity degradation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration suppresses the degradation of linearity in the power amplification module by preventing the cutting of negative bias current, allowing for controlled gain adjustment without increasing current consumption.
Implementation Method 1
a first capacitor that is provided between the base and the emitter of the third bipolar transistor
Implementation Method 2
a first bipolar transistor in which a base and a collector are connected to each other and a bias control current that is supplied to the collector
Data Source
AI summary
A power amplification module includes a first amplification transistor that receives a first signal outputs an amplified second signal from the collector thereof; and a bias circuit that supplies a bias current to the base of the first amplification transistor. The first bias circuit includes a first transistor that is diode connected and is supplied with a bias control current; a second transistor that is diode connected, the collector thereof being connected to the emitter of the first transistor; a third transistor, the base thereof being connected to the base of the first transistor, and the bias current being output from the emitter thereof; a fourth transistor, the collector thereof being connected to the emitter of the third transistor and the base thereof being connected to the base of the second transistor; and a first capacitor between the base and the emitter of the third transistor.