Bias Circuit Second Order Process Variation Compensation
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Solution Overview
Problem
Current bias circuits in semiconductor circuits face challenges in maintaining stable bias currents due to process variations, which can result in significant deviations in transistor performance, as they lack effective compensation for variations in threshold voltage and power supply fluctuations.
Innovation Solution
A bias circuit with second-order process variation compensation is introduced, utilizing a first compensation transistor operating in saturation mode and a second compensation transistor operating in linear mode as an active resistor, which widens the range of control current and control voltage applied to the biasing transistor, thereby reducing bias current variations by approximately 20-25% and maintaining a stable bias current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a simple resistor divider is used to set the gate-source voltage, then the circuit complexity is low, but the bias current varies significantly due to process variations
Solution Approach 1:
The patent implements feedback by using a compensation FET that senses the bias current through a resistive control path and automatically adjusts the gate voltage of the biasing FET to maintain constant bias current despite process variations. The compensation FET draws compensating current through the resistive path, creating a feedback loop that stabilizes the bias current.
Solution Approach 2:
The patent introduces a compensation FET as an intermediary element between the power supply and the biasing FET. This compensation FET acts as a mediator that senses process variations and translates them into compensating voltage adjustments, thereby stabilizing the bias current without directly modifying the biasing FET.
2Reliability
If a compensation FET operating in saturation mode is used to compensate for process variations, then the bias current stability improves, but the device complexity increases
Solution Approach 1:
The compensation FET is designed to perform multiple functions: it operates as a current source in saturation mode to provide bias current, simultaneously acts as a sensor to detect process variations, and functions as an active element to generate compensating voltage. This multi-functionality reduces the need for separate compensation circuits.
Solution Approach 2:
The compensation FET is configured to automatically detect and compensate for process variations without external intervention. The resistive control path enables the compensation FET to self-adjust its operating point based on the actual bias current, creating a self-regulating system that maintains stability autonomously.
3Reliability
If the compensation FET operates in saturation mode, then it provides current source functionality, but the control voltage range is limited
Solution Approach 1:
The patent employs dynamic operation by allowing the compensation FET to transition between saturation and linear modes depending on the required control voltage range. The resistive control path enables continuous adjustment of the compensation FET's operating point, providing dynamic adaptability to different bias conditions while maintaining current source functionality.
Solution Approach 2:
The patent changes the operating parameters of the compensation FET by utilizing both saturation and linear regions. By adjusting the gate voltage and utilizing the resistive control path, the compensation FET can operate with varying drain-source voltages and currents, expanding the control voltage range while maintaining effective compensation.
Data Source
AI summary
A bias circuit includes second order process variation compensation in a current source topology having a compensation transistor operating in saturation mode as a current source. An additional compensation transistor is biased to operate in a linear mode to provide an active resistor to vary a control voltage applied to the saturation mode compensation transistor and widen the range of sourced control current, thus widening the achievable range of the control voltage applied to the biasing transistor to produce a predetermined level of bias current despite process variations. The additional compensation transistor has been shown to be able to compensate for another approximately 20-25% of the induced variations leaving less than approximately 10% and preferably less than 5% variation in the bias current from the predetermined level at certain bias conditions and over typical fabrication process variations.