Bias-Current Hybrid Oscillator for Stable Low-Power Clocks

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Solution Overview

Problem

Ring oscillators suffer from frequency instability due to process variations and temperature effects, while relaxation oscillators consume excessive power to achieve stability.

Innovation Solution

A hybrid circuit combining features of ring and relaxation oscillators, utilizing a bias circuit with a controllable resistance and varactor to generate stable oscillator currents, independent of threshold voltage, and a calibration circuit to adjust resistance and capacitance for precise frequency control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a ring oscillator is used to generate clock signals, then power consumption is low, but frequency stability deteriorates due to process variation and temperature effects

Engineering Contradiction:
Improvepower consumptionVSAvoidfrequency stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent merges the low-power advantage of ring oscillators with the frequency stability of relaxation oscillators by combining inverter-based delay stages with RC timing circuits. Each delay stage includes both the inverter and the RC circuit, creating a hybrid structure that achieves both low power consumption and temperature-compensated frequency stability.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If a relaxation oscillator is used to improve frequency stability, then frequency stability improves, but power consumption increases due to fast comparator requirements

Engineering Contradiction:
Improvefrequency stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts and removes the power-hungry comparator component from the relaxation oscillator design. Instead of using a fast comparator to detect voltage thresholds, the invention uses the inherent switching behavior of CMOS inverters combined with RC timing circuits to achieve frequency stability without requiring high-speed comparators, thereby significantly reducing power consumption.

Inventive Principle:
Principle #2Taking out (Extraction)

3Use of energy by moving object

If inverter gate-based delays are used in ring oscillators, then power consumption is low, but frequency precision deteriorates due to threshold voltage dependence

Engineering Contradiction:
Improvepower consumptionVSAvoidfrequency precision
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The patent changes the critical parameters from threshold voltage-dependent inverter switching to RC time-constant-dependent timing. By making the oscillation period depend on resistor and capacitor values rather than transistor threshold voltages, the system achieves temperature compensation and improved frequency precision while maintaining low power consumption characteristics.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a stable oscillation period across temperature and process variations, reducing power consumption and achieving frequency stability without relying on fast comparator speeds.

Implementation Method 1

a varactor coupled to the current source, where the current source is to charge the varactor based on the output signal

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11075602B1Oscillator compensation using bias current
Publication Date: 2021.07.27 SILICON LABORATORIES INC
  • US11075602B1 patent drawing
  • US11075602B1 patent drawing
  • US11075602B1 patent drawing

AI summary

In one embodiment, an apparatus includes: a bias circuit having a replica circuit, the bias circuit to generate an oscillator current that is proportional to a variation of the replica circuit; an oscillator circuit coupled to the bias circuit to receive the oscillator current and generate a plurality of signals using the oscillator current; and a waveform shaper circuit coupled to the oscillator circuit to receive the plurality of signals and generate at least one clock signal from the plurality of signals.