Bias Current Generator Using Offset Buffering

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Solution Overview

Problem

Existing electronic devices require large chip area and high power consumption to generate bias currents with specific temperature coefficients due to the limitations of prior art solutions using NTC and PTC components, which restrict the range and flexibility of base-emitter voltage (VBE) and result in high resistance values for resistors.

Innovation Solution

The use of a differential amplifier with an input-related offset to buffer the voltage across an NTC or PTC component, allowing for a reduced voltage drop across a resistor, thereby enabling a smaller resistor value and reduced chip area, while maintaining the desired temperature coefficient of the output current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a feedback loop is used to force VBE across a resistor to generate NTC current, then the current through the resistor has the NTC of the bipolar transistor's base emitter voltage, but the resistance must be very large (several MΩ) resulting in high power consumption and large chip area

Engineering Contradiction:
Improvetemperature coefficient accuracyVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent changes the voltage parameter by introducing an offset voltage (300-500 mV) at the differential amplifier input, which systematically reduces the voltage drop across the resistor from the full VBE (700-800 mV) to a reduced value. This parameter change allows the resistor value to be reduced from several MΩ to a much smaller value, decreasing chip area while maintaining the NTC characteristic through the differential amplifier's buffering action.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If the feedback circuitry has very low power consumption, then the resistance of the resistor should be very large or the VBE has to be very small, but the range and flexibility of VBE is very restricted

Engineering Contradiction:
Improvepower consumptionVSAvoidVBE range
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The differential amplifier acts as an intermediary device that buffers the voltage across the NTC component. By introducing an offset voltage at its input, it systematically reduces the output voltage to provide a smaller voltage drop across the resistor. This intermediary approach allows the circuit to achieve low power consumption with a moderate resistor value while maintaining design flexibility through the adjustable offset voltage range (300-500 mV).

Inventive Principle:
Principle #24Intermediary (Mediator)

3Power

If a resistor with high resistance (several MΩ) is used to achieve low current and NTC effect, then power consumption is reduced, but a lot of chip area is required to implement the resistor

Engineering Contradiction:
Improvecurrent levelVSAvoidresistor area
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

The patent applies parameter changes by introducing an offset voltage (300-500 mV) that systematically reduces the voltage drop across the resistor. This allows the resistor value to be reduced from several MΩ to a much smaller value (e.g., kΩ range), which dramatically reduces the chip area required for the resistor implementation while maintaining the desired low current level through the differential amplifier's voltage buffering and reduction capability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the required chip area and power consumption for generating bias currents with specific temperature coefficients, achieving area savings of up to 20% and maintaining the temperature behavior of the output current.

Implementation Method 1

an NTC component coupled to receive a bias current

Methodology Applied
Scientific EffectNegative Temperature Coefficient (NTC): Thermistor

Implementation Method 2

a differential amplifier connected so as to buffer a voltage across the NTC component for providing a buffered output voltage based on the voltage across the NTC component, wherein the differential amplifier has a predetermined input related offset

Methodology Applied
Scientific EffectDifferential Amplification with Offset: Magnetic Amplifier

Data Source

PatentUS8441308B2Bias current generator
Publication Date: 2013.05.14 TEXAS INSTRUMENTS INC
  • US8441308B2 patent drawing
  • US8441308B2 patent drawing
  • US8441308B2 patent drawing

AI summary

An electronic device generates a current with a predetermined temperature coefficient. The circuit comprises a temperature coefficient (TC) component receiving a bias current, a differential amplifier providing a buffered output voltage based on the voltage across the TC component and a resistor receiving an TC current based on the differential amplifier output voltage. The differential amplifier has a predetermined input related offset which decreases the voltage drop across the resistor. The temperature coefficient component could have either a negative temperature component (NTC) or a positive temperature component (PTC).