Selective Coupling in Bias Current Receivers to Prevent Gate Antenna Damage

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Solution Overview

Problem

Integrated circuits (ICs) face the challenge of gate antenna effect during manufacturing, where metal traces coupling reference current generators to current mirrors can damage field effect transistors (FETs) due to charge discharge through the gate oxide, leading to decreased yield.

Innovation Solution

A selective coupling circuit is implemented in the ICs to selectively couple the drain of a first FET to the gates of both FETs based on the voltage at the drain, preventing direct coupling and thus avoiding gate antenna effect damage, while also including control circuits to manage enable signals and supply voltage for accurate current mirroring.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the metal trace is directly coupled to the gates of the current mirror FETs, then the current mirror operation is simplified, but gate antenna effect damage occurs due to charge discharge through the gate oxide

Engineering Contradiction:
Improvecoupling circuit complexityVSAvoidFET reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

A selective coupling circuit is introduced as an intermediary between the metal trace and the gates of the current mirror FETs. This circuit includes a first FET whose drain is selectively coupled to the gates through a coupling circuit, preventing direct connection and thus eliminating the gate antenna effect while maintaining current mirror functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the selective coupling circuit is implemented to prevent gate antenna effect, then FET reliability is improved, but device complexity increases due to additional control circuits

Engineering Contradiction:
ImproveFET reliabilityVSAvoidcoupling circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The selective coupling circuit is configured to automatically control the coupling between the drain and gates based on the voltage state at the drain. The circuit self-regulates by enabling coupling when the voltage indicates normal operation and disabling it when voltage conditions suggest potential damage risk, eliminating the need for external control signals.

Inventive Principle:
Principle #25Self-service

3Productivity

If the drain is selectively decoupled from gates to prevent antenna effect, then manufacturing yield is improved, but current mirror accuracy may be affected by voltage drops

Engineering Contradiction:
Improvemanufacturing yieldVSAvoidcurrent mirror accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The coupling between the drain and gates is made dynamic rather than static. The selective coupling circuit adjusts the coupling state based on real-time voltage conditions at the drain, enabling the system to optimize between protection mode (decoupled) and operation mode (coupled) to maintain both yield and accuracy.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11736105B1Bias current receiver with selective coupling circuit
Publication Date: 2023.08.22 QUALCOMM INC
  • US11736105B1 patent drawing
  • US11736105B1 patent drawing
  • US11736105B1 patent drawing

AI summary

An integrated circuit (IC), including: a current mirror, including: a first field effect transistor (FET) including a first drain, a first gate, and a first source, wherein the first source is coupled to a first voltage rail; and a second FET including a second drain, a second gate, and a second source, wherein the second gate is coupled to the first gate of the first FET, and the second source is coupled to the first voltage rail; and a selective coupling circuit configured to selectively couple the first drain of the first FET to the first and second gates of the first and second FETs based on a voltage at the first drain of the first FET.