Bias Current Circuit for Wide Common-Mode Voltage Shifting
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Solution Overview
Problem
Integrated circuit devices face challenges in handling varying common mode voltages, particularly with decreasing supply voltages, leading to issues such as increased current variation, duty cycle performance degradation, and inability to support higher common mode voltages, which affects the operation of transistors and differential receivers.
Innovation Solution
A circuit and method that shift input common mode voltage by generating and controlling currents in multiple current paths with bias current control circuits, allowing for a wide range of common mode voltage inputs, improving offset tolerance, duty cycle performance, and reducing current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If supply voltage is decreased to reduce power consumption, then power consumption is reduced, but transistor operation becomes unstable and current variation increases
Solution Approach 1:
The patent changes the operating parameters of transistors by dynamically adjusting bias currents based on the common mode voltage level. When supply voltage is decreased, the bias current control circuits adjust the tail current and branch currents to maintain transistors in saturation region, preventing operation instability and current variation while operating at lower power consumption
Solution Approach 2:
The patent implements feedback mechanisms where the common mode voltage is detected and used to control the bias current generation circuits. The bias current control circuits continuously adjust the tail current and differential pair currents based on the detected common mode voltage, creating a closed-loop system that maintains stable transistor operation across varying supply voltages
2Power
If folded cascade structure is used to achieve high gain, then gain is improved, but offset sensitivity increases and skew is amplified
Solution Approach 1:
The patent applies preliminary action by adjusting the bias currents before the differential signal processing occurs. The tail current and differential pair currents are pre-adjusted based on the common mode voltage level, ensuring that transistors are properly biased before amplification. This preliminary bias adjustment prevents offset amplification and skew in the high-gain folded cascade structure
Solution Approach 2:
The patent changes the current parameters dynamically based on common mode voltage. By adjusting the tail current and branch currents according to the common mode voltage level, the patent optimizes the operating point of transistors in the folded cascade structure, reducing sensitivity to offset while maintaining high gain performance
3Reliability
If bias current is increased to maintain transistor saturation at low supply voltage, then transistor operation is stabilized, but current consumption increases
Solution Approach 1:
The patent applies dynamics by making the bias current adjustable rather than fixed. The bias current control circuits dynamically adjust the tail current and differential pair currents based on the detected common mode voltage level. This dynamic adjustment allows the system to use higher bias currents only when necessary to maintain saturation, while reducing bias currents when common mode voltage allows, thus balancing reliability and power consumption
Solution Approach 2:
The patent changes the bias current parameter based on operating conditions. By detecting the common mode voltage and adjusting the tail current and branch currents accordingly, the patent optimizes the trade-off between maintaining transistor saturation and minimizing current consumption. The system uses higher currents only when needed for saturation maintenance, reducing overall power consumption
Data Source
AI summary
A circuit for shifting an input common mode voltage is described. The circuit comprises a first current path configured to generate a first current between a reference voltage and a ground potential, the first current path having a first output; a second current path configured to generate a second current between the reference voltage and the ground potential, the second current path having a second output; a first bias current control circuit coupled to the first current path and the second current path, wherein the first bias control circuit is configured to receive the input voltage to control the current in the first current path and the second current path; and a second bias current control circuit coupled to the first current path and the second current path, wherein the second bias control circuit is configured to receive the input voltage to control the current in the first current path and the second current path. A method of shifting an input common mode voltage is also described.