Bias Generator Circuit Reducing Flicker Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing bias generator circuits for wireless communications devices face challenges in achieving low-noise bias voltage and current due to flicker noise, which is exacerbated by the need for larger transistors that increase chip area and power consumption, and require digital controllers that complicate design and increase noise variability.
Innovation Solution
A bias generator circuit that uses a voltage generator circuit adjusting output voltage based on clock cycles, a comparator for reference voltage comparison, and a clock gating circuit to control clock signal supply, eliminating the need for digital controllers and reducing flicker noise by minimizing steady-state current flow through switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If transistors of increased size are used to reduce flicker noise, then noise level is reduced, but chip area increases
Solution Approach 1:
The patent segments the bias generation function into multiple smaller transistor units operating in parallel. Instead of using one large transistor, multiple smaller transistors are used to generate the bias current, which reduces the flicker noise while maintaining a compact chip area. The segmentation allows the circuit to achieve low noise performance without requiring large individual transistor sizes.
2Object-affected harmful factors
If transistors of increased size are used to reduce flicker noise, then noise level is reduced, but power consumption increases
Solution Approach 1:
The patent uses multiple smaller transistors in parallel instead of one large transistor. This segmentation approach reduces the total power consumption while achieving the same noise reduction effect, as each smaller transistor consumes less power individually and the parallel configuration allows for more efficient current distribution.
Solution Approach 2:
The patent employs periodic switching of transistors in the bias generation circuit. By periodically activating and deactivating transistor pairs, the circuit reduces average power consumption while maintaining low noise performance. The periodic action allows the circuit to achieve the desired bias current with lower instantaneous power requirements.
3Ease of operation
If digital controllers are used to control bias voltage, then bias voltage control is achieved, but design complexity increases
Solution Approach 1:
The patent implements a self-service mechanism where the bias generation circuit automatically adjusts and stabilizes the bias voltage without requiring external digital controllers. The circuit uses inherent feedback mechanisms and transistor characteristics to self-regulate the bias voltage, eliminating the need for complex control logic and reducing overall design complexity.
Solution Approach 2:
The patent incorporates feedback mechanisms within the bias generation circuit that automatically adjust the bias voltage based on the operating conditions. The feedback loop monitors the bias current and voltage levels, and dynamically adjusts the transistor switching to maintain optimal bias conditions, providing simple yet effective control without digital controllers.
4Ease of operation
If switches are turned ON to control resistance value, then bias voltage control is achieved, but steady-state current flows causing flicker noise
Solution Approach 1:
The patent employs periodic switching of transistors instead of maintaining continuous steady-state current flow. By periodically activating and deactivating transistor pairs in a controlled sequence, the circuit achieves bias voltage control while minimizing the time that current flows through the switches, thereby reducing flicker noise generation.
Solution Approach 2:
The patent uses preliminary action by pre-charging and pre-discharging capacitor nodes before switching operations. This preliminary action ensures that when switches are activated, the current flow is minimized and controlled, preventing large transient currents and reducing flicker noise. The capacitors are prepared in advance to smooth the current flow during switching transitions.
Data Source
AI summary
Disclosed herein is a bias generator circuit for generating a desired bias voltage or bias current using a simple configuration. The bias generator circuit includes a voltage generator circuit, a comparator, and a clock gating circuit. The voltage generator circuit increases or decreases its output voltage in accordance with the number of clock cycles of a given clock signal. The comparator compares the output voltage of the voltage generator circuit to a reference voltage. The clock gating circuit receives, as a control signal, output of the comparator and determines, in accordance with the control signal, whether or not to pass the clock signal to the voltage generator circuit. Thus, the output voltage of the voltage generator circuit, i.e., a bias voltage, is set to be close to the reference voltage.