Bias Circuit Impedance Adjustment for PA Memory Effect
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Solution Overview
Problem
The memory effect of power amplifiers in wireless communication systems, particularly in 5G NR, is hindered by the asymmetry of intermodulation distortion between upper and lower sidebands due to fixed and non-adjustable source impedance, limiting linearity improvement.
Innovation Solution
An impedance adjustment circuit connected in parallel with the bias current output end of a bias circuit, which adjusts the source impedance of the first circuit unit, utilizing components like inductors and diodes with adjustable impedance characteristics to optimize impedance without affecting fundamental wave and harmonic impedances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the source impedance of the power amplification transistor is kept fixed, then the bias circuit structure is simple, but the asymmetry in intermodulation distortion of upper and lower sidebands becomes severe
Solution Approach 1:
The bias circuit is divided into two independent parts: a basic bias circuit that provides the bias current, and an impedance adjustment circuit that specifically adjusts the source impedance. This segmentation allows each circuit to perform its dedicated function independently, enabling impedance adjustment without complicating the overall bias circuit structure.
Solution Approach 2:
An impedance adjustment circuit is introduced as an intermediary component between the bias circuit and the power amplification transistor. This intermediary circuit specifically targets the source impedance adjustment, allowing precise control of the impedance to reduce intermodulation distortion asymmetry without affecting the bias current provision.
2Reliability
If the source impedance is made adjustable, then the memory effect of the power amplifier is reduced, but the device complexity increases
Solution Approach 1:
The impedance adjustment circuit changes the source impedance parameter dynamically through control signals. By adjusting the impedance parameter in response to different operating conditions, the circuit reduces memory effect and improves linearity without requiring a completely complex reconfiguration of the power amplifier structure.
Solution Approach 2:
The impedance adjustment circuit is designed to work with standard power amplifier components and can be integrated into existing amplifier architectures. The circuit provides multiple functions including impedance adjustment, memory effect reduction, and linearity improvement, making the added complexity worthwhile through multi-functional benefits.
Data Source
AI summary
An impedance adjustment circuit is connected in parallel with a bias current output end of a bias circuit. The bias circuit is configured to provide bias current to a first circuit unit. The impedance adjustment circuit is configured to adjust source impedance of the first circuit unit.


