Bias-Controlled Voltage Level Shifter for SOA-Safe Negative Voltages

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Solution Overview

Problem

Existing voltage level shifters face challenges in ensuring that all transistors operate within safe operation areas (SOA) when dealing with varying voltage conditions, especially when a negative reference voltage is applied.

Innovation Solution

The proposed voltage level shifter incorporates a main level shifter and two bias level shifters to generate bias voltages that ensure all transistors within the main level shifter operate within SOA regulations, even under different operational modes such as erase and non-erase modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a negative reference voltage is applied to the level shifter to expand voltage range, then adaptability is improved, but transistors may violate SOA regulations

Engineering Contradiction:
Improvevoltage rangeVSAvoidSOA compliance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces bias level shifters as intermediary components that generate intermediate voltage levels (e.g., -3V, -6V) between the negative reference voltage and ground. These intermediary voltage levels are used to bias the gates of transistors in the main level shifter, ensuring that voltage differences across transistor terminals remain within SOA limits while still enabling the level shifter to operate across a wide voltage range. The bias level shifters act as mediators that reconcile the conflict between wide voltage range operation and SOA compliance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If bias level shifters are added to ensure SOA compliance, then reliability is improved, but device complexity increases

Engineering Contradiction:
ImproveSOA complianceVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bias level shifters are designed to perform multiple functions: they generate bias voltages for different groups of transistors, provide voltage level shifting capability, and ensure SOA compliance across various operating conditions. By making the bias level shifters multi-functional, the patent reduces the need for additional separate components, thereby limiting the increase in device complexity while maintaining high reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If all transistors are biased to meet SOA regulations, then reliability is improved, but voltage shifting capability may be limited

Engineering Contradiction:
ImproveSOA complianceVSAvoidvoltage range
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent employs dynamic biasing where the bias voltages generated by the bias level shifters are adjusted based on the operating mode and voltage levels. The bias voltages are not fixed but adapt to different conditions, allowing the main level shifter to maintain SOA compliance while achieving wide voltage shifting capability. This dynamic adjustment enables the system to optimize both reliability and adaptability simultaneously.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250088179A1Voltage level shifter
Publication Date: 2025.03.13 EMEMORY TECH INC
  • US20250088179A1 patent drawing
  • US20250088179A1 patent drawing
  • US20250088179A1 patent drawing

AI summary

A voltage level shifter is provided. The voltage level shifter includes a main level shifter, a first bias level shifter and a second bias level shifter. The main level shifter includes a first N-type transistor and a second N-type transistor cross-coupled to each other, a third N-type transistor and a fourth N-type transistor controlled by a first bias voltage, a fifth N-type transistor and a sixth N-type transistor respectively controlled by a second bias voltage and a third bias voltage, and a first P-type transistor and a second P-type transistor configured to respectively receive an input signal and an inverted input signal which have opposite voltage values. The first bias level shifter generates the first bias voltage according to an enable signal. The second bias level shifter generates the second bias voltage and the third bias voltage according to the first bias voltage and the input signal.