Bias Network Quiescent Current Control Using D-FET
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing bias networks for mobile power amplifiers have limited voltage range and accuracy in controlling quiescent current, restricting efficient operation due to constraints in digital-to-analog converter voltage ranges and reliance on high base-emitter voltage, leading to low control accuracy.
Innovation Solution
The use of a triple-gate depletion mode field effect transistor (D-FET) in conjunction with a current mirror and a compensating device to expand the voltage regulation range and improve control accuracy, allowing quiescent current control down to approximately 0.7 V, and compensating for process variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a typical bias network uses a fraction of the available voltage range (limited by doubled base-emitter voltage), then the circuit operation is simplified, but the control accuracy of quiescent current decreases
Solution Approach 1:
The patent changes the fundamental voltage parameter requirement by using depletion mode FETs instead of bipolar transistors. This allows the bias network to operate with regulator voltages as low as 0.7V instead of requiring 2.5V minimum, thereby utilizing the full DAC voltage range (0.1V-2.9V) and achieving both simplified operation and high control accuracy through the relationship Iccq = (Vreg - 0.7V) / R1
2Measurement precision
If the voltage range for quiescent current control is expanded to utilize the full DAC range, then the control accuracy improves, but the device complexity increases
Solution Approach 1:
The patent achieves full voltage range utilization through parameter change by selecting depletion mode FETs with specific characteristics (pinch-off voltage, threshold voltage) that enable operation at low regulator voltages. The circuit maintains simplicity while expanding the controllable voltage range from 0.4V to 2.8V, providing 2.4V of accurate control range for quiescent current adjustment
Solution Approach 2:
The patent employs readily available depletion mode FETs (such as 2N7000 or similar CMOS FETs) that are inexpensive and widely used in digital circuits. These FETs are typically discarded or underutilized in digital logic applications but provide excellent bias control when used in this analog biasing configuration, achieving high accuracy without requiring specialized expensive components
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables accurate quiescent current control over a wider voltage range, enhancing the biasing of radio frequency transistors and reducing current leakage, thus improving the efficiency and accuracy of power amplifiers.
Implementation Method 1
a triple-gate depletion mode field effect transistor (D-FET) in conjunction with a current mirror to expand the voltage regulation range and improve control accuracy
Implementation Method 2
a current mirror that includes a heterojunction bipolar transistor (HBT) to provide a mirror current
Data Source
AI summary
Embodiments of apparatuses and systems for a bias network providing accurate quiescent current control are generally described herein. Other embodiments may be described and claimed.