Bias Prediction Circuit for Conditional Instructions

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Solution Overview

Problem

Current processor technologies face challenges in accurately predicting the outcomes of conditional instructions, leading to inefficiencies and increased workload due to mispredictions, especially with the increasing complexity and width of execution pipelines.

Innovation Solution

The implementation of a bias prediction circuit and an instruction prediction circuit within the processor, which provide separate predictions at different stages of the instruction processing, allowing predictively-biased conditional instructions to bypass the instruction prediction circuit and reduce overall workload.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a conditional instruction prediction circuit is implemented to predict conditional instructions, then instruction pipeline efficiency is improved, but prediction accuracy deteriorates leading to increased mispredictions and workload

Engineering Contradiction:
Improveinstruction pipeline efficiencyVSAvoidprediction accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The prediction circuit is divided into two separate circuits: a bias prediction circuit that predicts whether a conditional instruction is biased toward true or false, and an instruction prediction circuit that predicts the actual outcome. This segmentation allows each circuit to specialize in specific aspects of prediction, improving overall accuracy while maintaining pipeline efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The bias prediction circuit acts as an intermediary that provides bias information to the instruction prediction circuit. This intermediate layer of bias prediction helps the instruction prediction circuit make more accurate predictions by considering the biased nature of conditional instructions, thereby reducing mispredictions.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If execution pipeline width and depth are increased to process multiple instructions, then processing throughput is improved, but complexity of handling conditional instructions increases

Engineering Contradiction:
Improveprocessing throughputVSAvoidcomplexity of handling conditional instructions
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The complex task of predicting conditional instructions in a wide and deep pipeline is segmented into two specialized circuits. The bias prediction circuit handles the bias determination, while the instruction prediction circuit handles the outcome prediction. This segmentation reduces the complexity burden on any single circuit while enabling efficient handling of multiple conditional instructions simultaneously.

Inventive Principle:
Principle #1Segmentation

3Speed

If speculative instruction fetching is implemented based on predictions, then instruction execution speed is improved, but penalty for mispredictions increases

Engineering Contradiction:
Improveinstruction execution speedVSAvoidpenalty for mispredictions
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The bias prediction circuit continuously monitors the actual outcomes of conditional instructions and uses this feedback to update its predictions. By incorporating feedback from actual execution results, the circuit improves its prediction accuracy over time, thereby reducing misprediction penalties while maintaining high instruction execution speed through speculative fetching.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20240385842A1Conditional Instructions Prediction
Publication Date: 2024.11.21 APPLE INC
  • US20240385842A1 patent drawing
  • US20240385842A1 patent drawing
  • US20240385842A1 patent drawing

AI summary

A processor may include a bias prediction circuit and an instruction prediction circuit to provide respective predictions for a conditional instruction. The bias prediction circuit may provide a bias prediction whether a condition of the conditional instruction is biased true or biased false. The instruction prediction circuit may provide an instruction prediction whether the condition of the conditional instruction is true of false. Responsive to a bias prediction that the condition of the conditional instruction is biased true or biased false, the processor may use the bias prediction from the bias prediction circuit to speculatively process the conditional instruction. Otherwise, the processor may use the instruction prediction from the instruction prediction circuit to speculatively process the conditional instruction.