Bias Voltage Generator for Reference Cell Read Disturb Mitigation
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Solution Overview
Problem
In serial interface flash memory, the bias voltage applied to the reference cell during read operations can cause read disturb, leading to reduced read margin and performance degradation, especially when the operation frequency is low, resulting in prolonged damage to the memory cell.
Innovation Solution
A bias voltage generator system comprising a data read detector, a cut-off signal generator, and an output stage circuit that detects transition points in sense amplifier signals to generate a cut-off signal, allowing adaptive cessation of bias voltage to the reference cell during low-frequency operations, thereby preventing long-term exposure and mitigating read disturb.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If bias voltage is applied to the reference cell gate during read operations, then read operation can be performed, but read disturb occurs and read margin is reduced
Solution Approach 1:
The patent applies periodic action by using a cut-off signal to periodically interrupt the bias voltage application to the reference cell gate. The cut-off signal is generated based on detection of sense amplifier enable and latch signals, creating periodic on-off cycles that allow read operations while preventing continuous exposure that causes read disturb.
Solution Approach 2:
The patent implements preliminary anti-action by detecting the sense amplifier control signals and generating a cut-off signal in advance to prevent excessive bias voltage application. The cut-off signal is generated before read disturb can occur by monitoring the sense amplifier enable and latch signals, thereby preemptively protecting against the harmful effect.
2Productivity
If bias voltage is applied for a long time to the reference cell, then sequential address reading can be performed, but memory cell deterioration occurs
Solution Approach 1:
The patent uses periodic action to interrupt bias voltage application during sequential reads. The cut-off signal periodically stops the bias voltage based on sense amplifier signal transitions, allowing sequential address reading to continue while preventing long-term exposure that causes memory cell deterioration.
Solution Approach 2:
The patent implements feedback by using the sense amplifier enable and latch signals to control the cut-off signal generation. This feedback mechanism monitors the read operation status and automatically adjusts bias voltage application, stopping it when appropriate to prevent memory cell damage while maintaining sequential read capability.
3Loss of energy
If operation frequency is low, then power consumption is reduced, but bias voltage exposure time increases causing worse damage
Solution Approach 1:
The patent applies periodic action to interrupt bias voltage regardless of operation frequency. The cut-off signal periodically stops bias voltage based on sense amplifier signal transitions rather than time duration, so even at low frequencies where total exposure would be long, the periodic interruptions prevent cumulative damage while allowing necessary read operations.
Data Source
AI summary
A bias voltage generator and generating method for a reference cell are provided. The bias voltage generator includes a data read detector, a cut-off signal generator and an output stage circuit. The data read detector generates a detection signal according to transition points of a sense amplifier enable signal and a sense amplifier latch signal. The cut-off signal generator delays the detection signal a delay time to generate a cut-off signal, wherein a start-up time of the cut-off signal is decided by the detection signal and the delay time. The output stage circuit starts or stops to provide a bias-voltage providing signal according to the cut-off signal.