Bias Voltage Pulsing for High-Aspect-Ratio Plasma Etching
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Solution Overview
Problem
In semiconductor device fabrication, high aspect ratio etching processes face challenges in achieving a balance between etch rate and selectivity of target materials relative to mask materials, often resulting in low etch rates and profile control issues due to high bias voltage applications, which can lead to mask material removal and distortion.
Innovation Solution
A method involving alternating bias voltage settings, with a high bias voltage for rapid etching and a low bias voltage to maintain mask material integrity, combined with advanced RF power supply systems using multiple generators and synchronization logic to control ion interaction, enabling precise etching control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high bias voltage is applied to increase etch rate, then etching speed improves, but mask material removal and distortion occur
Solution Approach 1:
The patent applies periodic pulsing of bias voltage between high and low levels during the etching process. During high bias voltage pulses, ions are accelerated to achieve rapid etching of the target material. During low bias voltage pulses, ion acceleration is reduced to prevent mask material damage. This periodic modulation allows the process to achieve high overall etch rates while preserving mask integrity through temporal separation of aggressive etching and protective phases.
2Productivity
If high bias voltage is applied to improve etching speed, then productivity increases, but profile control deteriorates
Solution Approach 1:
By periodically modulating the bias voltage between high and low states, the patent achieves rapid etching during high voltage pulses while maintaining profile control during low voltage pulses. The alternating phases allow ions to penetrate deeply during high bias periods for speed, then reduce angular spread during low bias periods to maintain vertical sidewalls and prevent undercutting, thus achieving both high productivity and good profile control.
3Productivity
If continuous high bias voltage is applied, then etch rate is maximized, but mask material removal increases
Solution Approach 1:
The patent implements periodic switching between high bias voltage (for rapid etching) and low bias voltage (for mask protection) states. During high bias phases, ion flux is intensified to achieve high etch rates on the target material. During low bias phases, ion energy is reduced to minimize sputtering and removal of the mask material. This temporal modulation allows the process to accumulate etching progress while limiting mask consumption over the total process time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances etch rate and selectivity of target materials while minimizing mask material removal and distortion, improving the overall etching process efficiency and profile control in high aspect ratio applications.
Implementation Method 1
The system includes an RF power supply connected to generate and transmit RF signals to the substrate holder for generating a bias voltage at the substrate holder
Implementation Method 2
The plasma is often generated by applying radiofrequency (RF) power to a process gas in a controlled environment, such that the process gas becomes energized and transforms into the desired plasma
Implementation Method 3
bias voltage applied to attract charged constituents of the plasma toward the substrate
Data Source
AI summary
A substrate is disposed on a substrate holder within a process module. The substrate includes a mask material overlying a target material with at least one portion of the target material exposed through an opening in the mask material. A plasma is generated in exposure to the substrate. For a first duration, a bias voltage is applied at the substrate holder at a first bias voltage setting corresponding to a high bias voltage level. For a second duration, after completion of the first duration, a bias voltage is applied at the substrate holder at a second bias voltage setting corresponding to a low bias voltage level. The second bias voltage setting is greater than 0 V. The first and second durations are repeated in an alternating and successive manner for an overall period of time necessary to remove a required amount of the target material exposed on the substrate.