Biased Current-Limit Circuit for Stable Power Converter Output
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing current limit schemes for power converters either result in power loss due to input resistors or cause sub-harmonic oscillations when limiting switching current, especially at high flux densities in transformers.
Innovation Solution
A biased current-limit circuit that includes an oscillator, waveform generator, sample-hold circuit, and current comparator to generate a pulse signal and current-limit threshold, allowing for the comparison of current-sensing signals to limit the maximum on-time of switching signals without the drawbacks of previous methods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If an input resistor is connected to the input voltage for current limiting, then the output power can be limited, but power loss occurs at the input resistor
Solution Approach 1:
The patent extracts the current sensing function from the input voltage path by using a separate current-sensing resistor connected in series with the switching transistor. This allows current limiting to be implemented without placing a resistor in the input voltage path, thereby eliminating the power loss issue while maintaining the ability to limit output power through current monitoring
Solution Approach 2:
The patent introduces a current-sensing resistor as an intermediary element that measures the switching current without being part of the main power path. This intermediary component enables current monitoring and limiting functionality while minimizing impact on the main power flow, thus achieving power limitation without significant energy loss
2Power
If a saw-limiter is used to limit switching current, then the output power can be limited, but sub-harmonic oscillation occurs when flux density of transformer is high
Solution Approach 1:
The patent implements dynamic current limiting by continuously monitoring the current-sensing signal and comparing it with a reference voltage throughout the switching cycle. The control circuit dynamically adjusts the switching transistor's on-time based on real-time current conditions, preventing the fixed-threshold sub-harmonic oscillations that occur with static saw-limiter approaches, especially under high flux density conditions
Solution Approach 2:
The patent employs feedback control by comparing the current-sensing signal with a reference voltage and using the comparator output to control the switching transistor's on-time. This closed-loop feedback mechanism ensures stable current limiting by continuously adjusting the switching duty cycle based on actual current conditions, eliminating the sub-harmonic oscillations inherent in open-loop saw-limiter designs
Data Source
AI summary
A biased current-limit circuit for limiting a maximum output power of a power converter includes an oscillator for generating a pulse signal. A waveform generator generates a waveform signal in response to a switching signal and a second-sampling signal. A sample-hold circuit is used to sample the waveform signal to generate a hold signal in response to a first-sampling signal. The sample-hold circuit further samples the hold signal to generate a current-limit threshold in response to the second-sampling signal. A current comparator is utilized to compare a current-sensing signal with the current-limit threshold to limit a maximum on-time of the switching signal.