Biased Memory String Voltage Programming for Noise Reduction

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Solution Overview

Problem

In dense memory architectures, such as BiCS memory, the reduced size of memory circuitry leads to increased noise from neighboring memory cells, causing programming inefficiencies and varying programming times due to discrepancies in contact line connector thickness, particularly in 4-bit memory cells and those with large numbers of memory holes.

Innovation Solution

The implementation of a control circuitry that applies biased word line and bit line voltages based on the position of memory cells within the array, specifically within memory string groups and planes, to offset programming delays and improve programming efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are arranged in dense arrays to increase storage capacity, then the quantity of memory cells increases, but noise from neighboring memory cells increases causing programming inefficiencies

Engineering Contradiction:

Improvequantity of memory cellsVSAvoidnoise from neighboring memory cells

Core Design Contradiction:

Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The memory array is divided into multiple memory string groups (e.g., first group 102, second group 104) with different voltage biases applied to each group. This segmentation allows independent voltage control for different regions, enabling the system to maintain high density while managing noise interference through group-specific programming strategies.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different voltage biases are applied to different memory string groups based on their specific positions and interference characteristics. The first memory string group receives a first voltage bias while the second memory string group receives a second voltage bias, creating local quality variations that optimize programming performance for each region despite the overall high-density architecture.

Inventive Principle:

Principle #3Local quality

2Ease of manufacture

If contact line connector thickness varies across memory strings, then manufacturing simplicity is maintained, but programming times vary causing inefficiency

Engineering Contradiction:

Improvecontact line connector thickness variationVSAvoidprogramming time variation

Core Design Contradiction:

Ease of manufactureVSLoss of time

Solution Approach 1:

The system changes the voltage bias parameter for different memory string groups to compensate for variations in contact line connector thickness. By adjusting the voltage bias, the programming characteristics are normalized across groups with different physical dimensions, eliminating programming time variations without requiring precise manufacturing control.

Inventive Principle:

Principle #35Parameter changes

3Device complexity

If uniform voltage is applied to all memory cells, then device complexity is reduced, but programming efficiency decreases due to position-dependent variations

Engineering Contradiction:

Improvevoltage bias configurationVSAvoidprogramming efficiency

Core Design Contradiction:

Device complexityVSProductivity

Solution Approach 1:

The voltage bias configuration is made dynamic and adaptive rather than static and uniform. The control circuitry determines and applies different voltage biases to different memory string groups based on their positions and characteristics, allowing the system to optimize programming efficiency for each region while maintaining manageable device complexity through automated voltage determination.

Inventive Principle:

Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the performance and reliability of BiCS and other multi-tier memory architectures by reducing programming time and resource consumption, ensuring even distribution of programming time across memory cells regardless of their position.

Implementation Method 1

applying a set of biased word line voltages to one or more selected word lines... The set of biased word line voltages may have values that are based on positions of respective memory cells in the array

Methodology Applied

Scientific EffectElectric Field: Electric Field

Data Source

PatentUS12051467B2Programming of memory cells using a memory string dependent program voltage

Publication Date: 2024.07.30 SANDISK TECHNOLOGIES LLC

AI summary

A storage device including control circuitry, communicatively coupled to a non-volatile memory, configured to perform a programming operation to program a set of memory cells. The control circuitry, when performing the programming operation, may be configured to apply a set of biased program voltages to lines connecting to respective memory cells in an array. The set of biased program voltages may have values that are based on positions of the respective memory cells within the array relative to an outer memory string group of a set of memory string groups.