Biased Randomization Circuit for Neural Network Inference

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Solution Overview

Problem

Current neural network architectures, particularly those using Long Short-Term Memory (LSTM) networks, face challenges in power consumption and chip space due to the need for high-performance graphical processing units (GPUs) for floating-point multiplications, which limits their deployment in portable and efficient computing devices.

Innovation Solution

The implementation of a neural network architecture that employs biased randomization to approximate scaling operations, using probabilistic propagation of weights instead of traditional floating-point multiplications, reducing the need for power-intensive hardware and minimizing chip footprint.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional floating-point multiplication operations are used in neural network processing nodes, then computation accuracy is maintained, but power consumption increases and chip space requirements expand

Engineering Contradiction:
Improvecomputation accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent changes the computational parameter from precise floating-point multiplication to probabilistic binary operations. Instead of performing exact arithmetic operations, the system uses randomized binary decisions that approximate the statistical behavior of floating-point multiplications, thereby reducing power consumption while maintaining sufficient computational accuracy for neural network inference

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces expensive, power-intensive floating-point multiplication hardware with simpler, cheaper binary operation circuits. The system uses basic logical operations and random number generation that can be implemented with minimal hardware resources, effectively using simple computational primitives to achieve complex neural network processing

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Measurement precision

If traditional floating-point multiplication operations are used in neural network processing nodes, then computation accuracy is maintained, but chip footprint increases

Engineering Contradiction:
Improvecomputation accuracyVSAvoidchip footprint
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent transforms the computational approach from requiring precise floating-point arithmetic hardware to using probabilistic binary operations. This parameter change enables the same neural network functionality to be achieved with significantly reduced hardware footprint, as binary operations require far fewer transistors and circuit elements than floating-point units

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes complex mechanical-style floating-point arithmetic circuits with simpler logical and probabilistic systems. Instead of using traditional CPU-style arithmetic logic units, the system employs binary randomization and logical operations that can be implemented with minimal circuitry, dramatically reducing chip area requirements

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If high-performance GPUs are used for neural network processing, then processing speed is improved, but device portability is reduced

Engineering Contradiction:
Improveprocessing speedVSAvoiddevice portability
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent replaces expensive, power-hungry GPU hardware with inexpensive, low-power binary operation circuits that can be integrated directly into portable devices. The simplified computational approach enables neural network processing to be performed on mobile devices without requiring dedicated GPU hardware, thereby improving portability while maintaining acceptable processing speeds

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS11960997B1Circuit architecture with biased randomization
Publication Date: 2024.04.16 AMAZON TECH INC
  • US11960997B1 patent drawing
  • US11960997B1 patent drawing
  • US11960997B1 patent drawing

AI summary

Disclosed herein are techniques for classifying data with a data processing circuit. In one embodiment, the data processing circuit includes a probabilistic circuit configurable to generate a decision at a pre-determined probability, and an output generation circuit including an output node and configured to receive input data and a weight, and generate output data at the output node for approximating a product of the input data and the weight. The generation of the output data includes propagating the weight to the output node according a first decision of the probabilistic circuit. The probabilistic circuit is configured to generate the first decision at a probability determined based on the input data.