BICM Bit Interleaver Layout for QC-LDPC Parallel Decoding
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Solution Overview
Problem
Conventional bit interleavers for bit-interleaved coded modulation with quasi-cyclic low-density parity-check codes face inefficiencies due to impaired parallelism and increased latency when the number of cyclic blocks is not a multiple of the interleaver matrix columns, and are limited by the number of possible configurations, particularly in iterative BICM decoding.
Innovation Solution
A bit interleaving method and corresponding interleaver that maps M bits of each constellation to different cyclic blocks and all constellation words to specific cyclic blocks, ensuring efficient interleaving by dividing the codeword into N/M sections and applying section permutations, which can be implemented with a cyclic block permutation, intra-cyclic-block permutation, and column-row permutation to optimize performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional bit interleavers are used with fixed matrix columns, then device complexity is reduced, but parallelism is impaired and latency increases when the number of cyclic blocks is not a multiple of the interleaver matrix columns
Solution Approach 1:
The interleaver matrix configuration is made dynamic by allowing the number of columns to be adjusted based on the number of cyclic blocks. Instead of using a fixed matrix structure, the system adapts the matrix dimensions to match the codeword parameters, enabling efficient parallel processing without latency penalties when cyclic blocks are not multiples of fixed column counts.
Solution Approach 2:
The patent changes the parameter of interleaver matrix columns from a fixed value to a variable that can be set according to the specific codeword length and cyclic block count. This parameter adaptation allows the system to optimize parallelism for different code rates and block sizes, eliminating the latency issue that arises when cyclic blocks don't align with fixed matrix dimensions.
2Adaptability or versatility
If the number of interleaver matrix columns is fixed, then device complexity is lowered, but the number of possible interleaver configurations is limited
Solution Approach 1:
The interleaving function is segmented into two independent stages: cyclic block permutation and intra-block bit permutation. This segmentation allows each stage to be configured independently, multiplying the total number of possible interleaver configurations without requiring a completely new interleaver structure for each configuration.
Solution Approach 2:
The interleaver is designed as a universal structure that can perform multiple interleaving patterns through different configuration combinations. By separating the permutation into two stages with independently configurable parameters, a single interleaver device can achieve versatility across multiple configurations without increasing fundamental structural complexity.
3Reliability
If section permutations are applied to optimize mapping, then receiver performance improves, but device complexity increases
Solution Approach 1:
The permutation operation is segmented into two distinct functions: cyclic block permutation (rearranging blocks) and intra-block bit permutation (rearranging bits within blocks). This segmentation allows the use of simple, efficient algorithms for each stage rather than requiring a complex monolithic permutation structure, achieving optimal mapping without excessive complexity.
Data Source
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AI summary
Bit interleaving method for interleaving a QC-LDPC codeword made up of N cyclic blocks each consisting of Q cyclic block bits and the constellation word being made up of M bits with N being not a multiple of M. The bit interleaving comprises a cyclic block permutation step, a bit permutation step and a dividing step, where the N-N' cyclic blocks, with N' = N - remainder (N/M), are excluded from the bit permutation process. After the cyclic block permutation process, the N' cyclic blocks are divided so that the Q bits in each of the N' cyclic block are each allocated to a bit of an identical bit index in Q constellation words and said Q constellation words are each made up of one bit from each of M different cyclic blocks, said M different cyclic blocks being common to said Q constellation words.