Bidirectional Bipolar Transistors Cellular Layout Wafer Bowing
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Solution Overview
Problem
Existing bidirectional bipolar transistors with parallel trench layouts suffer from wafer bowing due to thermal expansion differences between trench fill materials and silicon, making it difficult to process wafers, especially when thinner wafers are used for high voltage applications.
Innovation Solution
A two-surface cellular layout is introduced for bidirectional power bipolar transistors, where each emitter/collector region is surrounded by an insulating trench with an insulated field plate tied to the emitter/collector potential, and the outer side is surrounded by a p-type base connection region, reducing the risk of wafer bowing and improving stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If parallel trench layouts are used for bidirectional bipolar transistors, then the device structure is simplified and manufacturing is easier, but wafer bowing occurs due to thermal expansion differences between trench fill materials and silicon
Solution Approach 1:
The patent divides the wafer surface into discrete cellular units, each containing an emitter/collector region surrounded by an insulating trench. This segmentation into isolated cells prevents the cumulative stress effects that would occur with continuous parallel trenches, thereby maintaining wafer flatness while preserving manufacturing simplicity.
Solution Approach 2:
The patent applies insulating trenches locally around each emitter/collector region rather than using continuous parallel trenches across the entire wafer. This localized approach provides the necessary electrical isolation and breakdown voltage protection at each device site without creating the cumulative thermal stress that leads to wafer bowing.
2Productivity
If thinner wafers are used for high voltage applications, then device performance is improved, but wafer bowing becomes more severe during processing
Solution Approach 1:
By segmenting the wafer into discrete cellular units with isolated trenches, the patent eliminates the cumulative stress that would cause bowing in thinner wafers. Each cell acts independently, preventing the buildup of residual stress that would otherwise lead to severe bowing in thin wafer structures used for high voltage applications.
3Device complexity
If repeated parallel trenches are used for emitter/collector isolation, then device fabrication is simplified, but cumulative residual stress causes wafer bowing
Solution Approach 1:
The patent replaces repeated parallel trenches with discrete insulating trenches that surround each emitter/collector region in a cellular pattern. This segmentation breaks the continuity of trenches, eliminating the cumulative residual stress that causes wafer bowing while maintaining straightforward device fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The cellular layout enhances wafer stability and reduces the risk of wafer bowing, allowing for successful processing and efficient operation of bidirectional power bipolar transistors by minimizing residual stress and maintaining uniform current density across the emitter/collector regions.
Implementation Method 1
wafer bowing due to thermal expansion differences between trench fill materials and silicon
Implementation Method 2
base connection region (e.g. p-type), which provides an ohmic connection to the substrate
Data Source
AI summary
A two-surface bidirectional power bipolar transistor is constructed with a two-surface cellular layout. Each emitter/collector region (e.g. doped n-type) is a local center of the repeated pattern, and is surrounded by a trench with an insulated field plate, which is tied to the potential of the emitter/collector region. The outer (other) side of this field plate trench is preferably surrounded by a base connection region (e.g. p-type), which provides an ohmic connection to the substrate. The substrate itself serves as the transistor's base.