Bidirectional Ripple Counter Unit Cell for Small-Pixel Charge Capacity
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Solution Overview
Problem
Traditional image capturing devices face challenges in maintaining effective charge accumulation and conversion due to shrinking unit cell sizes, leading to diminished photo-charge capacity and inefficiencies in Analog to Digital Conversion (ADC) processes.
Innovation Solution
A digital unit cell with a small, low-power bidirectional ripple counter that can increment and decrement count values based on integration voltage thresholds, using a dynamic comparator and multiplexer to manage count direction signals, and an image processing unit to calculate actual count values with a global correction term.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If unit cell sizes are decreased to increase pixel density, then the photo-charge capacity of well capacitors diminishes, but higher pixel density is achieved
Solution Approach 1:
The patent segments the charge accumulation process into multiple integration intervals, allowing charge to be accumulated in discrete steps across multiple periods. This enables the effective photo-charge capacity to exceed the physical capacitor size by temporal multiplication rather than spatial expansion.
Solution Approach 2:
The patent transitions from spatial charge storage (capacitor size) to temporal charge accumulation (multiple integration intervals). By adding the time dimension to charge accumulation, the system achieves effective capacity multiplication without increasing physical unit cell area.
2Quantity of substance
If traditional ADC conversion is used in each unit cell, then photo-charge capacity is limited by capacitor size, but circuit complexity is reduced
Solution Approach 1:
The patent extracts the ADC function from individual unit cells and relocates it to a centralized readout circuit. Each unit cell only performs simple charge accumulation and digital counting, while the complex voltage-to-digital conversion is performed externally, reducing in-cell complexity while maintaining high photo-charge capacity.
Solution Approach 2:
The patent introduces a digital counter as an intermediary between the charge accumulation stage and the ADC conversion stage. The counter tracks the number of integration intervals, enabling delayed conversion without loss of precision and allowing complex ADC operations to be performed outside the unit cell.
3Measurement precision
If bidirectional counting is implemented to improve motion detection accuracy, then measurement precision improves, but counter circuit complexity increases
Solution Approach 1:
The patent implements bidirectional counting by inverting the clock signal direction based on motion detection polarity. Instead of building two separate counting paths, the system uses a single counter that can count up or down by controlling the phase of the clock signal, reducing circuit complexity while maintaining measurement precision.
Solution Approach 2:
The patent makes the counter operation dynamic by allowing the counting direction to change based on real-time motion detection requirements. The counter can switch between incrementing and decrementing modes, enabling accurate measurement of both forward and backward motion without requiring duplicate static counting circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the effective capacity of image sensors while maintaining small unit cell sizes, improving accuracy in motion detection and image processing by enabling both incrementing and decrementing count values, thereby enhancing the overall image capture and processing efficiency.
Implementation Method 1
a photodiode configured to generate charge in response to light received by the photodiode over an integration period
Implementation Method 2
an integration node coupled to an output of the photodiode and configured to accumulate the charge
Data Source
AI summary
Aspects and embodiments are directed to a digital unit cell comprising an integrator circuit, a dynamic comparator configured to compare an integration voltage of the integrator circuit with a reference voltage, provide a first pulse signal each time the integration voltage is less than the reference voltage, and provide a second pulse signal each time the integration voltage exceeds the reference voltage, a multiplexer configured to receive a count direction control signal, and a counter element configured to increment a count value each time the first pulse signal or the second pulse signal is received, wherein the multiplexer is configured to couple a first output of the dynamic comparator to the counter element when the count direction control signal is in a first state, and to couple a second output of the dynamic comparator to the counter element when the count direction control signal is in a second state.