Bidirectional Data Lines for Client Phase Information

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Solution Overview

Problem

Current asymmetrical IO systems are inefficient and costly due to redundant circuitry for synchronization and the need for dedicated pins to transfer client-side phase information, which increases form factors and expenses.

Innovation Solution

Implementing a shared phase interpolator and using multiple bidirectional data lines to transmit phase information from the client to the host, eliminating the need for additional dedicated lines or pins, and utilizing a multiplexer to control the shared phase interpolator for phase adjustments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If dedicated pins are added to carry phase information for each data bit, then phase synchronization accuracy is improved, but device complexity and form factor increase

Engineering Contradiction:
Improvephase synchronization accuracyVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The bidirectional data lines are made to serve dual purposes: transmitting data during active periods and carrying phase information during idle periods. This eliminates the need for dedicated phase carrier pins while maintaining synchronization accuracy, directly resolving the contradiction between precision and complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The data lines remain continuously utilized by transmitting phase information during idle periods rather than remaining inactive. This continuous useful action maximizes the utility of existing resources without adding new components, addressing both accuracy and complexity concerns

Inventive Principle:
Principle #20Continuity of useful action

2Reliability

If redundant phase interpolators are included in both host and client, then synchronization reliability is improved, but manufacturing cost increases

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Phase interpolators are consolidated into a single location (host or client) rather than being duplicated in both devices. The shared phase information transmitted over bidirectional lines allows the single interpolator to perform synchronization for both devices, reducing component count and manufacturing cost while maintaining reliability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Bidirectional data lines act as intermediaries to carry phase information between host and client. This intermediary mechanism allows a single phase interpolator to control synchronization for both devices without requiring redundant interpolators in each device, resolving the cost-reliability contradiction

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of stationary object

If client includes minimum intelligence for IO management, then device area and cost are reduced, but host burden increases

Engineering Contradiction:
Improvedevice areaVSAvoidhost burden
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

IO management functions are segmented and distributed: the client handles local phase detection and information generation, while the host handles phase interpolation and clock adjustment. This segmentation allows the client to remain simple with minimal intelligence, while the host assumes the heavier computational burden, resolving the contradiction between area and complexity

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7509515B2Method and system for communicated client phase information during an idle period of a data bus
Publication Date: 2009.03.24 ATI TECHNOLOGIES ULC
  • US7509515B2 patent drawing
  • US7509515B2 patent drawing
  • US7509515B2 patent drawing

AI summary

A system and method for transmitting client phase information to a host device over a bidirectional data link is described. Embodiments include detecting a phase of a clock signal relative to a data signal transmitted between a host device and a client device over a bidirectional data link. The data link includes one or more data lines each configured to transmit a corresponding bit of the data signal. The phase is encoded as client phase information and transmitted between the host and client device over the one or more data lines. The client phase information is transmitted during an electrical turnaround time period of the bidirectional data link between a read and write operation over the data link.