Bidirectional High-Voltage FET Structure With High-k Dielectric Layer
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Solution Overview
Problem
High-voltage bidirectional FET devices face disproportionate increases in fabrication costs and complexity due to the need for increased separation between terminals and the use of field plates, limiting their availability for high-voltage applications.
Innovation Solution
Employing a complex oxide dielectric material along the FET channel with a dielectric constant greater than 50 to moderate field gradients, allowing for more compact and cost-effective bidirectional FET designs by integrating a high dielectric layer and field plates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the voltage rating of the bidirectional FET device is increased, then the device can handle higher voltages, but the distance between terminals must increase by twice that proportion, leading to increased device size and fabrication costs
Solution Approach 1:
The patent introduces a dielectric layer with high dielectric constant (greater than 50) positioned between the gate and channel, which changes the electrical parameters of the device. This high-k dielectric layer modifies the field gradient distribution, allowing higher voltage ratings without proportionally increasing the terminal distance, thus resolving the contradiction between voltage handling capability and device dimensions
Solution Approach 2:
The patent employs a composite structure combining the semiconductor channel with a dielectric oxide layer having dielectric constant greater than 50. This composite material approach creates a multi-layer structure that moderates field gradients more effectively than single-material designs, enabling compact high-voltage bidirectional FETs by reducing the required terminal separation distance for a given voltage rating
2Reliability
If field plates are used to suppress peak electrical gradients in high-voltage FETs, then the electric field control is improved, but the fabrication costs increase by as much as 10% of device fabrication costs
Solution Approach 1:
The patent changes the dielectric parameter by introducing a high-k dielectric layer (dielectric constant greater than 50) between the gate and channel. This parameter change modifies the field gradient distribution, reducing peak electrical gradients without requiring field plates, thereby maintaining electric field control while eliminating the associated fabrication costs and complexity
Solution Approach 2:
The patent extracts or removes the field plate structure from the device architecture. By using the high-k dielectric layer to moderate field gradients, the field plates become unnecessary, eliminating their associated fabrication costs (up to 10% of total fabrication cost) and structural complexity while maintaining reliable electric field control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables higher voltage ratings with shorter channel lengths, reducing device size and fabrication costs, thereby making high-voltage bidirectional FETs economically viable.
Implementation Method 1
a dielectric oxide having a dielectric constant of greater than 50 is along and adjacent to the channel operative to moderate field gradients
Data Source
AI summary
A bidirectional FET switch combining gate elements greatly reduces chip area and cost through the use of a dielectric layer with a high dielectric constant of a complex oxide moderating peak electrical gradients when used with or without field plates.