Bi-directional LDMOS Transistor with Common Drain Node

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Solution Overview

Problem

High voltage transistors in integrated circuits face challenges with bi-directionality due to increased series resistance and the need for thick gate dielectric layers, which are difficult to integrate into fabrication processes.

Innovation Solution

A three-terminal bi-directional LDMOS transistor is designed by configuring two uni-directional LDMOS transistors to share a common drain node, with source nodes acting as both source and drain terminals, and using blocking diodes to connect gate nodes, reducing series resistance and allowing integration into CMOS and BiCMOS ICs without additional fabrication complexity or cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If bi-directional configuration is implemented using two separate unidirectional LDMOS transistors, then voltage modulation capability is improved, but series resistance increases

Engineering Contradiction:
Improvevoltage modulation capabilityVSAvoidseries resistance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent merges two unidirectional LDMOS transistors into a single integrated structure where they share a common drain node and common substrate connection. This consolidation maintains the bi-directional voltage modulation capability while reducing the total series resistance compared to using two separate transistors, as the shared components eliminate redundant resistance paths.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If thick gate dielectric layers are used to achieve bi-directionality, then voltage breakdown resistance is improved, but fabrication complexity increases

Engineering Contradiction:
Improvevoltage breakdown resistanceVSAvoidfabrication complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines two LDMOS transistors into a shared structure with common drain and substrate connections, achieving bi-directional operation without requiring thick gate dielectric layers. This approach maintains voltage breakdown resistance while avoiding the fabrication complexity associated with thick dielectric integration.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Instead of using thick gate dielectric to prevent breakdown (conventional approach), the patent inverts the approach by using the shared drain and substrate architecture to inherently provide breakdown protection while maintaining standard thin dielectric layers, thus simplifying fabrication.

Inventive Principle:
Principle #13The other way round (Inversion)

3Adaptability or versatility

If bi-directional configuration is implemented, then operational versatility is improved, but integration into CMOS processes becomes difficult

Engineering Contradiction:
Improveoperational versatilityVSAvoidintegration into CMOS processes
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent merges two LDMOS transistors into a compact shared structure that can be integrated into standard CMOS and BiCMOS fabrication processes. The common drain and substrate architecture reduces the number of discrete components and interconnections, making the bi-directional device compatible with existing CMOS manufacturing workflows.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8217453B2Bi-directional DMOS with common drain
Publication Date: 2012.07.10 TEXAS INSTRUMENTS INC
  • US8217453B2 patent drawing
  • US8217453B2 patent drawing
  • US8217453B2 patent drawing

AI summary

A three terminal bi-directional laterally diffused metal oxide semiconductor (LDMOS) transistor which includes two uni-directional LDMOS transistors in series sharing a common drain node, and configured such that source nodes of the uni-directional LDMOS transistors serve as source and drain terminals of the bi-directional LDMOS transistor. The source is shorted to the backgate of each LDMOS transistor. The gate node of each LDMOS transistor is clamped to its respective source node to prevent source-gate breakdown, and the gate terminal of the bi-directional LDMOS transistor is connected to the gate nodes of the constituent uni-directional LDMOS transistors through blocking diodes. The common drain is a deep n-well which isolates the two p-type backgate regions. The gate node clamp can be a pair of back-to-back zener diodes, or a pair of self biased MOS transistors connected source-to-source in series.