Bidirectional Link CRC Feedback for High-Speed Memory Reliability
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Solution Overview
Problem
Existing memory systems face challenges in maintaining low bit-error-rate (BER) communication due to signaling and circuit limitations, especially as data rates increase, leading to potential reliability issues and higher costs in developing faster interfaces.
Innovation Solution
Implementing a controller with bi-directional data links and unidirectional error-detection information, using encoders to dynamically add error-detection information to data, and comparing these to detect errors, with retry logic for remedial actions such as re-transmission, to maintain low BER.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data rates are increased to achieve faster interfaces, then productivity is improved, but bit-error-rate increases leading to reliability deterioration
Solution Approach 1:
The patent applies preliminary action by generating and transmitting error detection codes (CRC) with the data before transmission errors can occur. The encoder generates CRC codes for outgoing data, and the receiver generates CRC codes for incoming data, allowing error detection to be performed before the data is used, thus preventing reliability issues from affecting system operation.
Solution Approach 2:
The patent implements feedback by having the receiver generate and compare CRC codes with the transmitted data, detect errors, and potentially request retransmission. This feedback mechanism allows the system to identify and correct errors that occur during high-speed transmission, maintaining reliability despite increased data rates.
2Reliability
If error detection and correction mechanisms are added to maintain low BER, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent extracts the error detection function into a separate CRC encoding and comparison mechanism that operates independently from the main data transmission path. By using dedicated CRC generators and comparators that work in parallel with data processing, the system adds error detection capability without significantly complicating the core data path logic.
Solution Approach 2:
The patent uses copying by generating redundant CRC code copies of the data and transmitting them alongside the original data. The receiver then generates its own copy of the CRC codes and compares it with the transmitted copy to detect errors. This copying approach provides simple error detection without requiring complex error correction algorithms.
3Productivity
If conventional interfaces are used with increasing data rates, then productivity is improved, but noise increases due to increased bandwidth leading to reliability deterioration
Solution Approach 1:
The patent converts the harmful effect of noise during high-speed transmission into a detectable condition by using CRC error detection. Instead of trying to prevent noise from affecting the signal, the system allows the noise to potentially cause errors but then detects these errors through CRC comparison, enabling the system to identify and correct the harm rather than preventing it in the first place.
Data Source
AI summary
A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition.