Bidirectional MOS Switch Gate Drive for Fast Low-Power Switching
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Solution Overview
Problem
High-voltage bidirectional switch devices face challenges in minimizing energy consumption and area occupation due to high turn-on currents and parasitic capacitance issues, which are exacerbated by the need for low on-resistance and rapid switching times, leading to complex and costly circuit designs.
Innovation Solution
A high-voltage bidirectional switch device with a control and driving stage that uses NMOS transistors in a source-follower configuration to manage turn-on and turn-off efficiently, minimizing the need for high turn-on currents and avoiding complete discharge of parasitic capacitances, thereby reducing power consumption and area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high turn-on currents are used to achieve rapid switching times, then turn-on and turn-off times are reduced, but energy consumption increases
Solution Approach 1:
The patent applies preliminary action by pre-charging the gate of the MOS transistor through a dedicated current generator before the main switching event. This pre-charge prepares the gate capacitance in advance, so that when the actual switching is needed, the transistor can respond faster without requiring excessive turn-on current during the critical switching moment, thus resolving the contradiction between fast switching and energy consumption.
2Reliability
If MOS transistor size is increased to reduce on-resistance, then on-state resistance decreases, but parasitic capacitance increases
Solution Approach 1:
The patent extracts the gate charging function from the main switching path by using a separate current generator dedicated to charging the gate capacitance. This separation allows the MOS transistor to be sized for low on-resistance without penalty, because the gate charging current is provided independently rather than being drawn from the main switching current path, thus eliminating the harmful effect of increased parasitic capacitance.
3Reliability
If complex circuit designs are used to manage high voltages and rapid switching, then electrical characteristics improve, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the current generator to serve multiple functions: it charges the gate capacitance, provides the necessary drive current for rapid switching, and can be integrated into the existing high-voltage switch architecture. This multi-functional approach achieves improved electrical characteristics without proportionally increasing circuit complexity, as the same current generator structure handles multiple critical tasks.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves rapid turn-on and turn-off times with reduced power consumption and area occupation, maintaining efficiency while minimizing charge loss and complexity, and allows for increased MOS transistor size without penalizing turn-on time.
Implementation Method 1
a voltage limiting element 5 connected between the internal nodes G and S, in particular formed by a zener diode, having anode connected to the aforementioned internal node S and cathode connected to the aforementioned internal node G, and having the function of limiting the voltage between the same internal nodes G and S to a maximum value
Implementation Method 2
when the switch device 1 is off, the parasitic capacitances at the internal nodes G and S are totally discharged to the ground reference, so that the same capacitances need to be recharged each time, upon turn-on
Implementation Method 3
A high-voltage bidirectional switch device with a control and driving stage that uses NMOS transistors in a source-follower configuration to manage turn-on and turn-off efficiently, minimizing the need for high turn-on currents
Data Source
Figure 1~2
Figure 3
Figure 4A~4B
AI summary
A switch device (20) is described, formed by: a first switch MOS transistor (22), with its drain terminal connected to a first switch terminal (A), source terminal connected to an internal source node (S) and gate terminal connected to an internal gate node (G); a second switch MOS transistor (24), with its drain terminal connected to a second switch terminal (T), source terminal connected to the internal source node and gate terminal connected to the internal gate node; and a voltage limiting element (25) connected between the internal gate and source nodes. A driving stage (26), voltage-referred to the internal source node, drives the switching of the bidirectional switch, as a function a first and a second driving signals (drv_on, drv_off), and has a driving transistor (MON) and a switching transistor (MOFF), connected to each other; the driving transistor is driven by the first driving signal to charge the internal gate node and turn on the bidirectional switch; and the switching transistor is driven by the second driving signal to short-circuit the internal gate and source nodes and turn off the bidirectional switch.