Bi-directional Resistive Memory Cell for SRAM Speed
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Solution Overview
Problem
Conventional resistive memory devices exhibit slow read and write performance, making them unsuitable for replacing SRAM, and are difficult to produce reliably in one transistor/one resistive element or one diode/one resistive element configurations, limiting their viability in high-performance systems.
Innovation Solution
Implementing bi-directional resistive elements in a four transistor dynamic random access memory (DRAM) or six transistor SRAM cell configuration, allowing for read operations in less than five nanoseconds and write operations in less than ten nanoseconds, with data stored non-volatilely using conventional techniques and restored upon power-up.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If one transistor/one resistive element or one diode/one resistive element memory cell configuration is used, then cell area is minimized, but read and write performance becomes slow (approximately 30 nanoseconds or more per operation)
Solution Approach 1:
The memory cell is segmented into multiple functional components: access transistors for data input/output, storage nodes for data retention, and bi-directional resistive elements for non-volatile storage. This segmentation allows each component to be optimized independently, enabling fast SRAM-like operation while maintaining non-volatile storage capability.
Solution Approach 2:
The bi-directional resistive element serves multiple functions: it acts as a non-volatile storage element, provides data retention during power loss, and enables fast read/write operations when combined with the SRAM cell structure. This multi-functionality resolves the contradiction by making a single component serve both speed and non-volatility requirements.
2Device complexity
If one transistor/one resistive element or one diode/one resistive element memory cell configuration is used, then device complexity is reduced, but manufacturing reliability becomes difficult to achieve
Solution Approach 1:
By separating the volatile SRAM cell logic from the non-volatile resistive storage elements, the design allows each component to be manufactured using optimized processes. The SRAM portion uses conventional transistors with well-established manufacturing, while the resistive elements can be integrated using separate deposition and patterning steps, improving overall manufacturing reliability.
Solution Approach 2:
The storage nodes act as intermediaries between the access transistors and the bi-directional resistive elements. These storage nodes buffer and condition the signals, ensuring reliable data transfer and storage while isolating the sensitive resistive elements from direct transistor switching stresses, thereby improving manufacturing yield and device reliability.
3Duration of action of stationary object
If conventional resistive memory devices are used, then non-volatile storage is achieved, but read and write speeds are slow (approximately 30 nanoseconds or more per operation)
Solution Approach 1:
The patent merges the fast switching capability of SRAM transistors with the non-volatile storage property of bi-directional resistive elements. The SRAM cell provides rapid read/write access through its cross-coupled transistor structure, while the resistive elements retain data non-volatily. This combination achieves both fast operation (comparable to SRAM) and non-volatile storage in a unified memory cell.
Solution Approach 2:
The bi-directional resistive elements are pre-configured to maintain their resistance states without power, providing immediate data retention upon power-up. This preliminary action of maintaining storage state without active refreshing allows the memory to achieve non-volatile operation while the SRAM portion handles fast data access when powered.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables memory devices with read and write speeds comparable to SRAM, reducing standby power consumption and allowing data retention when powered down, thus potentially replacing DRAM and SRAM in various products.
Implementation Method 1
bi-directional resistive elements... Data is written to the cell at full speed using conventional techniques, followed by programming the resistive elements to store the data in a nonvolatile fashion
Data Source
AI summary
A memory cell includes a first bidirectional resistive memory element (BRME), and a second BRME, a first storage node, and a second storage node. A resistive memory write to the cell includes placing the first BRME and the second BRME in complementary resistive states indicative of the value being written. During a subsequent restoration operation, the value as written in the first BRME and second BRME is written to the first storage node and the second storage node while a wordline connected to the memory cell is deasserted.