Bi-directional Scan Driver Reducing Stage Count
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Solution Overview
Problem
Conventional scan drivers in display devices require a large number of stages and signal lines for bi-directional driving, which increases complexity and occupies a significant area, limiting their efficiency and compactness.
Innovation Solution
A scan driver with a reduced number of stages and signal lines is designed for bi-directional driving, utilizing a shift register structure with specific voltage levels and power source voltages for forward and reverse direction driving, allowing for efficient gate signal output and reduced area occupancy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional scan driver uses a large number of stages and signal lines for bi-directional driving, then the driving capability is achieved, but the device complexity and area occupancy increase
Solution Approach 1:
The scan driver circuit is designed to perform both forward scanning and reverse scanning functions using the same circuit structure. The shift register stages can operate in two directions by controlling the timing of scanning start signals, eliminating the need for separate dedicated circuits for each direction and thereby reducing overall device complexity while maintaining bi-directional capability
Solution Approach 2:
The patent introduces dynamic control mechanisms where the scan driver can switch between forward and reverse operating modes based on timing signals. The shift register stages dynamically adjust their operation sequence according to whether a first or second scanning start signal is received, allowing the same hardware to adapt to different scanning directions without structural changes
2Adaptability or versatility
If a conventional scan driver uses a large number of stages and signal lines for bi-directional driving, then the driving capability is achieved, but the area occupancy increases
Solution Approach 1:
The scan driver circuit is designed to perform both forward scanning and reverse scanning functions using the same circuit structure. The shift register stages can operate in two directions by controlling the timing of scanning start signals, eliminating the need for separate dedicated circuits for each direction and thereby reducing overall device complexity while maintaining bi-directional capability
Solution Approach 2:
The patent merges the forward scanning and reverse scanning functions into a single integrated circuit structure. By combining the control logic for both directions into one unified shift register system with shared signal lines and power source voltage circuits, the overall area occupancy is significantly reduced compared to having separate dedicated circuits for each scanning direction
3Device complexity
If the scan driver uses a reduced number of stages and signal lines, then the structure becomes simpler and area is reduced, but the driving efficiency may be compromised
Solution Approach 1:
The scan driver employs periodic scanning start signals (first and second scanning start signals with one pulse per frame) to control the shift register stages. This periodic activation pattern allows the reduced circuit structure to maintain efficient operation by systematically activating stages in sequence, ensuring complete scanning coverage without requiring additional permanent circuit elements
Solution Approach 2:
The patent uses preliminary timing control where the scanning start signals are generated and timed in advance to coordinate the operation of shift register stages. By pre-timing the activation sequences of different stages based on whether forward or reverse scanning is required, the system achieves efficient bi-directional operation without needing extra stages or signal lines
Data Source
AI summary
A scan driver includes stages dependently connected to each other, where each of the stages outputs a gate signal, where a first scanning start signal is input to a first stage of the stages, where a second scanning start signal is input to a last stage of the stages, where each of the first scanning start signal and the second scanning start signal has one pulse per frame, where the stages sequentially output a gate-on voltage between a time when a pulse of the first scanning start signal for a frame is input to the first stage and a time when a pulse of the second scanning start signal for the frame is input to the last stage, and where the stages output a first low voltage lower than the gate-on voltage after the pulse of the second scanning start signal for the frame is input to the last stage.