Bi-Directional Scan Flip-Flop Circuit for Reversible DFT Testing
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Solution Overview
Problem
Existing circuit designs for integrated circuits (ICs) lack efficient methods for error detection during design-for-test (DFT) processes, particularly due to fixed scan directions that compromise failure detection in certain directions.
Innovation Solution
A bi-directional scan flip-flop circuit with selectable scan directions, incorporating selection circuits and drivers that control data propagation between I/O nodes, enabling improved error detection by allowing forward and reverse scan operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed scan direction is used in traditional scan flip-flop circuits, then the circuit structure is simple, but the failure detection capability is compromised in certain directions
Solution Approach 1:
The patent implements bidirectional scan capability by making the scan direction dynamic rather than fixed. The scan direction is controlled by a direction control signal that can switch between forward and reverse directions, allowing the circuit to adapt its scanning behavior based on testing requirements. This dynamic approach enables comprehensive failure detection in both directions while maintaining reasonable circuit complexity through shared hardware resources.
Solution Approach 2:
The scan flip-flop circuit is designed to perform multiple functions: it can scan in forward direction, reverse direction, or be disabled entirely. The same physical circuit infrastructure supports both scanning directions by utilizing tri-state drivers and multiplexers that route data differently based on the direction control signal, thereby achieving universal testing capability without requiring separate dedicated circuits for each direction.
2Reliability
If bidirectional scan capability is added to improve error detection, then failure detection capability increases, but device complexity increases
Solution Approach 1:
The patent merges the forward and reverse scan paths into a single unified circuit structure. Instead of implementing separate independent scan paths for forward and reverse directions, the design combines both directions using shared flip-flops, multiplexers, and tri-state drivers. This merging approach reduces the overall circuit complexity compared to having completely separate bidirectional paths, while still achieving comprehensive error detection capability.
Solution Approach 2:
The patent introduces tri-state drivers and multiplexers as intermediary components that mediate between the scan data and the flip-flop inputs/outputs. These intermediaries enable bidirectional data flow by conditionally connecting or disconnecting signal paths based on the direction control signal, allowing the circuit to switch between forward and reverse scanning without requiring complex reconfiguration of the core flip-flop structure.
3Productivity
If traditional fixed-direction scanning is used, then the circuit is easier to operate, but test efficiency is reduced due to limited coverage
Solution Approach 1:
The patent changes the operational parameter of scan direction from a fixed state to a controllable variable. By introducing a direction control signal that can be set to different logic levels (0 or 1), the circuit can switch between forward and reverse scanning modes. This parameter change enables more comprehensive test coverage and improved test efficiency, while the control mechanism remains simple enough to maintain ease of operation through automated test equipment.
Data Source
AI summary
A scan flip-flop circuit includes first and second I/O nodes, a selection circuit coupled to the first and second I/O nodes and including first through third PMOS transistors arranged in parallel and first through third NMOS transistors arranged in parallel, each including a gate configured to receive a corresponding first through third signal, and an output terminal configured to output one of the first through third signals as a selected signal based on scan direction and scan enable signals, a flip-flop circuit including an input terminal coupled to the output terminal of the selection circuit and an output terminal configured to output an output signal based on the selected signal, first and second drivers coupled to the output terminal and configured to output the first signal to the first I/O node and the second signal to the second I/O node responsive to the selected signal and the scan direction signal.