Bidirectional Shift Register for Display Devices

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Solution Overview

Problem

Existing shift registers can only operate in one direction, preventing them from functioning when assembled in reverse, and require more transistors, which increases the area occupied, especially in high-resolution display devices.

Innovation Solution

A bidirectional shift register design that allows stages to be driven in both forward and reverse directions using a minimal number of transistors, reducing the overall area by having each stage output multiple signals and sharing transistors for both directions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a shift register is designed to operate in only one direction, then the device complexity is reduced, but the adaptability deteriorates because the shift register cannot function when assembled in reverse

Engineering Contradiction:
Improvebidirectional operation capabilityVSAvoidcircuit structure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The shift register stage is designed with universal transistors that can function in both forward and reverse directions. The first transistor controls signal transmission from the first node to the second node, while the second transistor controls signal transmission from the third node to the fourth node, enabling the same circuit structure to operate bidirectionally without requiring separate circuits for each direction.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If a bidirectional shift register is designed with separate transistors for both directions, then the adaptability improves, but the area occupied increases due to more transistors

Engineering Contradiction:
Improvebidirectional operation capabilityVSAvoidshift register area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The circuit merges the forward and reverse direction control into a single stage structure. The first transistor and second transistor are integrated within the same stage, sharing common nodes and control mechanisms. This merging allows bidirectional operation while minimizing the total transistor count and occupied area compared to having separate independent circuits for each direction.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If each stage outputs only a single signal, then the device complexity is reduced, but the productivity deteriorates because more stages are needed to cover the same output requirements

Engineering Contradiction:
Improveoutput signal coverageVSAvoidnumber of stages
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Each stage is designed with multi-functional output capability. The first transistor enables the stage to output a first signal to a first node, while the second transistor enables the stage to output a second signal to a third node. This universal output design allows a single stage to serve multiple output purposes, reducing the total number of stages needed in the shift register chain.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP3486894B1Shift register and display device comprising the same
Publication Date: 2023.12.27 LG DISPLAY CO LTD
  • EP3486894B1 patent drawingFigure 1
  • EP3486894B1 patent drawingFigure 2
  • EP3486894B1 patent drawingFigure 3

AI summary

A bi-directional shift register (140) can include a plurality of stages (ST), an Nth stage (ST(N)) among the plurality of stages (ST) including a first switching unit (210) configured to receive a forward driving signal (Vst) and a reverse driving signal (Vst(Rev)), and control a Q-node (Q); a second switching unit (220) configured to receive an (N + 2)th clock signal (CLK(N+2)), and control a QB-node (QB); a third switching unit (230) configured to discharge the QB-node (QB) to a low-level voltage (VGL) when the Q-node (Q) is charged to a high-level voltage (VGH), and discharge the Q-node (Q) to the low-level voltage (VGL) when the QB-node (QB) is charged to the high-level voltage (VGH); and an output unit configured to output an Nth clock signal (CLK(N)) to an output terminal based on a voltage at the Q-node (Q), in which the forward driving signal (Vst) is an output signal from an (N - 1)th stage or a forward start signal from an external source external to the shift register, and the reverse driving signal (Vst(Rev)) is an output signal from the (N + 1)th stage or a reverse start signal from the external source.