Bidirectional Shift Register with Symmetrical Circuit Structure
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Solution Overview
Problem
Existing shift registers in LCD manufacturing face issues with current leakage and ripple due to biased turned-off voltage, leading to larger circuit layout areas and higher costs, which hinder compact design and stability.
Innovation Solution
A bidirectional shift register with a symmetrical circuit structure and specific signal control sequence is implemented, using n+1 clock signal lines and reverse-biased output buffer stages to block leakage paths, allowing for smaller layout areas and higher stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage regulator circuit is increased to avoid current leakage and ripple issues, then stability is improved, but circuit layout area increases and cost increases
Solution Approach 1:
The patent extracts and eliminates the voltage regulator circuit from the shift register design by using a different transistor biasing approach. The output buffer stage transistors are biased in saturation mode through specific clock signal timing, which inherently prevents current leakage and ripple issues without requiring separate voltage regulator circuits, thereby reducing circuit layout area while maintaining stability
Solution Approach 2:
The patent changes the operating parameters of the output buffer stage transistors by controlling their biasing state through clock signal timing. By ensuring transistors are properly biased in saturation mode during active periods and cut-off during inactive periods, the design achieves stable operation without current leakage issues, eliminating the need for additional voltage regulator circuits
2Speed
If a-si TFT or a-IGZO TFT is used in GOA, then electro-mobility is improved, but current leakage occurs due to biased turned-off voltage
Solution Approach 1:
The patent applies periodic action by using clock signals to periodically control the biasing state of output buffer stage transistors. The transistors are switched between saturation mode (during active periods) and cut-off mode (during inactive periods) through periodic clock signal application, which prevents current leakage while maintaining high electro-mobility of a-IGZO TFTs
Solution Approach 2:
The patent makes the biasing state of output buffer stage transistors dynamic rather than static. By controlling the clock signal timing, the transistors dynamically transition between operating states, ensuring they are in saturation mode during signal output and in cut-off mode during idle periods, thereby eliminating current leakage while preserving high electro-mobility
3Use of energy by moving object
If GOA is turned-off to reduce power consumption, then turned-off voltage occurs, but current leakage and ripple issues increase
Solution Approach 1:
The patent applies beforehand cushioning by pre-biasing the output buffer stage transistors in saturation mode before they need to be active. This pre-biasing ensures that when the GOA is turned off, the transistors are already in a controlled state that prevents current leakage and ripple issues, cushioning against the harmful effects of turned-off voltage
Data Source
AI summary
A bidirectional shift register includes a first register circuit and a second register circuit. The first register circuit includes a first register stage and a first output buffer stage with n numbers of scanning signal output ends. The first register stage is electrically coupled to a third voltage source. The first output buffer stage is electrically coupled to a second voltage source and a first voltage source. The second register circuit has a similar circuit structure to the first register circuit; wherein the first register circuit and the second register circuit each use n+1 numbers clock signal lines, and the n is a positive integer.