Bi-Layer Spacer Material for FinFET Sidewall Cleaning
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Solution Overview
Problem
As semiconductor devices continue to shrink in feature size, challenges arise in the integration density of electronic components, including issues with the formation of precise features and materials in FinFET transistors, such as the removal of spacer materials and the formation of gate stacks, which affect the quality and efficiency of the manufacturing process.
Innovation Solution
A method involving the use of a bi-layer spacer material, where silicon nitride and silicon oxycarbonitride are deposited using atomic layer deposition, with nitrogen implantation to modify the etching properties, followed by selective wet etching to precisely remove the spacer material, enhancing the cleaning of fin sidewalls and reducing processing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional single-layer spacer material is used, then the manufacturing process is simpler, but the removal rate is low and residue remains on fin sidewalls
Solution Approach 1:
The spacer material is divided into two distinct layers: a first layer (silicon nitride) directly on the fin sidewall and a second layer (silicon oxycarbonitride) on top of the first layer. This segmentation allows selective removal of the second layer through wet etching while preserving the first layer, achieving both high removal rate and clean fin sidewalls without damaging the underlying structure.
Solution Approach 2:
Different materials with distinct etching properties are used for different layers. The second layer (silicon oxycarbonitride) is specifically designed to be removable by wet etching, while the first layer (silicon nitride) remains resistant to the same etching process, enabling selective removal and precise control over what remains on the fin sidewall.
2Manufacturing precision
If extended etching time is used to remove spacer material, then more complete removal is achieved, but processing time increases and fin sidewalls are damaged
Solution Approach 1:
The etching parameters are optimized by changing the material composition of the second layer to silicon oxycarbonitride, which has high etch selectivity to wet etchants. This allows complete removal of the spacer material in a controlled, short etching time while preventing damage to the fin sidewalls, as the first layer acts as a protective barrier.
3Productivity
If feature size is reduced to increase integration density, then more components fit in given area, but manufacturing precision and feature formation quality deteriorate
Solution Approach 1:
The bi-layer spacer structure enables precise control at reduced feature sizes by separating the spacer into functionally distinct layers. This segmentation maintains manufacturing precision even as overall dimensions shrink, allowing accurate feature formation and clean sidewall definition in high-density integration scenarios.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved removal rates and reduced residue, leading to higher quality epitaxial growth and better control over the semiconductor device manufacturing process, with a 50% improvement in fin sidewall pull back etch rate and minimal damage to the fin side walls.
Implementation Method 1
depositing a first material and a second material using atomic layer deposition
Implementation Method 2
nitrogen implantation to modify the etching properties
Implementation Method 3
selective wet etching to precisely remove the spacer material
Data Source
AI summary
A method of manufacturing a semiconductor device comprises forming a spacer material on the semiconductor fin and the gate stack, wherein the forming the spacer material further comprises using atomic layer deposition to deposit a first material on the semiconductor fin and using atomic layer deposition to deposit a second material on the first material, wherein the second material is different from the first material. The spacer material is removed from the semiconductor fin, wherein the removing the spacer material further comprises implanting an etching modifier into the spacer material to form a modified spacer material and removing the modified spacer material.