Bi-Layer Build-Up Dielectric for Low-Loss IC Package Adhesion

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Solution Overview

Problem

In electronics manufacturing, poor adhesion between conductive features and dielectric materials in IC package substrates leads to gap formation and cracking, reducing the reliability and performance of high-speed input/output devices.

Innovation Solution

A bi-layer or multi-layer build-up material architecture is employed, featuring a first dielectric layer with a matrix material and filler particles, and a second dielectric layer without filler material, which reduces surface roughness and prevents gap formation by using a conductive polyethylene teraphthalate (PET) film for electrostatic chucking and surface protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the roughness of conductive traces is reduced to mitigate insertion loss, then signal power loss is reduced, but adhesion between smooth metals and dielectric materials deteriorates

Engineering Contradiction:
Improveinsertion lossVSAvoidadhesion
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

A bi-layer dielectric structure is introduced as an intermediary system between the conductive trace and the substrate dielectric. The first dielectric layer provides a rough surface that enhances adhesion, while the second dielectric layer provides a smooth surface that reduces insertion loss. This intermediary layered structure resolves the contradiction by decoupling the conflicting requirements of adhesion and signal transmission.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dielectric structure is divided into two layers with different local properties: the first dielectric layer has a rough surface topology optimized for adhesion, while the second dielectric layer has a smooth surface topology optimized for reducing insertion loss. Each layer performs its specific function locally, allowing the system to satisfy both conflicting requirements simultaneously.

Inventive Principle:
Principle #3Local quality

2Strength

If filler material is included in the dielectric layer to improve mechanical properties, then structural strength is enhanced, but surface roughness increases leading to gap formation and cracking

Engineering Contradiction:
Improvestructural strengthVSAvoidsurface roughness
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The dielectric structure is segmented into two separate layers: the first dielectric layer contains the filler material for structural strength, while the second dielectric layer is substantially free of filler material for smooth surface finish. This segmentation allows each layer to optimize its composition for its specific function without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The filler material distribution is made non-uniform across the dielectric structure. The first dielectric layer has high filler content for mechanical strength where structural support is needed, while the second dielectric layer has low or no filler content for smooth surface quality where adhesion and signal transmission are critical. This local variation in material composition resolves the contradiction between strength and surface finish.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability and performance of high IO devices by reducing insertion loss and preventing cracking in the dielectric layer, thereby improving the adhesion and stability of the package substrate.

Implementation Method 1

using a conductive polyethylene teraphthalate (PET) film for electrostatic chucking

Methodology Applied
Scientific EffectElectrostatic chucking: Electrostatics

Implementation Method 2

reducing the roughness of conductive traces (such as copper traces) within a device

Methodology Applied
Scientific EffectSurface roughness reduction:

Implementation Method 3

a first dielectric layer with a matrix material and filler particles

Methodology Applied
Scientific EffectComposite material reinforcement: Composite Materials

Data Source

PatentUS20240006296A1Build up material architecture for microelectronic package device
Publication Date: 2024.01.04 INTEL CORP
  • US20240006296A1 patent drawing
  • US20240006296A1 patent drawing
  • US20240006296A1 patent drawing

AI summary

Microelectronic integrated circuit package structures include a first layer over a substrate, the first layer having a matrix material and a filler material within the matrix material. A second layer is on the first layer, the second layer comprising the matrix material or a second material, where the filler material is substantially absent from the second layer. A first portion of a conductive feature is on the second layer and a second portion of the conductive feature is on a sidewall of the first layer.