Bi-Layer Graphene Gate Structure for Higher Mobility Transistors
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Solution Overview
Problem
The semiconductor industry faces challenges in forming reliable semiconductor devices at increasingly smaller sizes due to the complexity and difficulty of fabrication processes as feature sizes decrease, leading to issues with device performance and efficiency.
Innovation Solution
The use of a two-layer graphene structure formed through controlled chemical vapor deposition processes with different temperature and pressure conditions improves the crystallinity and device performance by reducing graphene flake segregation and carbon clusters, enabling higher mobility and improved field-effect mobility values in graphene transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes are decreased to increase functional density, then production efficiency and cost are improved, but fabrication process difficulty and device reliability deteriorate
Solution Approach 1:
The patent applies parameter changes by optimizing deposition temperature and pressure conditions during graphene layer formation. By carefully controlling these parameters, the patent achieves high-quality graphene transistors with improved reliability at scaled dimensions, resolving the contradiction between miniaturization and device reliability.
2Productivity
If feature sizes are decreased to increase functional density, then production efficiency and cost are improved, but fabrication process complexity increases
Solution Approach 1:
The patent applies segmentation by forming multiple graphene layers with distinct deposition conditions. This segmented approach allows each layer to be optimized independently, simplifying the overall fabrication process while achieving the desired functional density and performance characteristics.
3Device complexity
If single-layer graphene is used, then device structure is simple, but graphene flake segregation and carbon clusters occur reducing device performance
Solution Approach 1:
The patent applies composite materials by combining multiple graphene layers deposited under different conditions. This composite structure eliminates the flake segregation and carbon cluster issues present in single-layer graphene, achieving superior crystallinity and device performance while maintaining structural simplicity.
4Manufacturing precision
If bi-layer graphene with different deposition conditions is used, then crystallinity and field-effect mobility are improved, but fabrication process complexity increases
Solution Approach 1:
The patent applies parameter changes by varying deposition temperature and pressure between the first and second graphene layers. This systematic parameter variation achieves improved crystallinity and field-effect mobility while maintaining a relatively straightforward fabrication process, as the same base process is used with optimized parameters.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in higher drain currents and field-effect mobility values for devices with bi-layer graphene, enhancing the performance of graphene transistors and potentially reducing device scale, thus addressing the challenges of smaller feature sizes in semiconductor fabrication.
Implementation Method 1
performing a first deposition process to form a first graphene layer over a substrate, the first deposition process being performed under a first temperature and a first pressure; performing a second deposition process to form a second graphene layer over the first graphene layer
Data Source
AI summary
A method includes performing a first deposition process to form a first graphene layer over a substrate, the first deposition process being performed under a first temperature and a first pressure; performing a second deposition process to form a second graphene layer over the first graphene layer, the second deposition process being performed under a second temperature and a second pressure, in which the first temperature is higher than the second temperature, and the first pressure is lower than the second pressure; forming a gate structure over the second graphene layer; and forming source/drain contacts on opposite sides of the gate structure and electrically connected to the first and second graphene layers.