Bi-Layer Pixel Isolation for Precise LCoS Back-Plane Etching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Advanced liquid crystal on silicon (LCoS) devices face challenges in precise etch processes due to the lack of chemical differentiability between pixel isolation (PI) and distributed Bragg reflector (DBR) materials, leading to over-etching and impairment of optical thickness, which affects the performance of LCoS back-planes.
Innovation Solution
A pixel isolation bilayer is formed with a stopping layer and a high-k layer, where the stopping layer generates a distinct optical emission spectroscopy (OES) signal during etching, allowing for selective etching to define pixel vias without over-etching the DBR, using a combination of reactive ion etch processes with selective chemistry to control the etch endpoint and reduce material removal from the DBR.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single-layer pixel isolation structure is used, then the manufacturing process is simpler, but the etch selectivity between pixel isolation material and DBR material is insufficient leading to over-etching
Solution Approach 1:
The pixel isolation structure is divided into two distinct layers: a first material layer (silicon oxide) and a second material layer (silicon nitride). This segmentation allows the etch process to selectively remove the first material layer while preserving the second material layer and the underlying DBR structure, thereby achieving precise etching control without compromising device complexity.
Solution Approach 2:
The second material layer (silicon nitride) acts as an intermediary etch-stop layer between the first material layer (silicon oxide) and the DBR structure. During the etch process, this intermediary layer prevents the etchant from reaching and damaging the DBR structure, enabling precise removal of the pixel isolation material while maintaining the integrity of the underlying layers.
2Productivity
If aggressive etching is used to remove pixel isolation material, then the etching speed is faster, but the optical thickness of LCoS layers is impaired
Solution Approach 1:
The etch process incorporates real-time monitoring of etch rate and depth, with the second material layer serving as a feedback mechanism. When the etchant reaches the silicon nitride layer, the etch rate changes significantly, providing a feedback signal to stop or adjust the etching process. This prevents over-etching and ensures the optical thickness of the LCoS layers remains within specifications.
Solution Approach 2:
The silicon nitride layer serves as a protective intermediary that allows aggressive etching of the silicon oxide layer while preventing the etchant from reaching the DBR structure. This intermediary layer enables high etching speeds without compromising the optical thickness precision of the underlying LCoS layers.
3Reliability
If the pixel isolation material is removed completely, then the pixel via is exposed, but the DBR structure is over-etched and damaged
Solution Approach 1:
The second material layer (silicon nitride) acts as a protective intermediary or etch-stop layer that prevents the etchant from reaching the DBR structure. This intermediary layer is removed after the pixel via is formed, ensuring complete exposure of the pixel via while protecting the DBR structure from over-etching and damage.
Solution Approach 2:
The pixel isolation bilayer structure is formed in advance before the etching process. The second material layer is deposited over the first material layer, creating a pre-configured protective structure that will stop the etchant before it reaches the DBR. This preliminary action ensures that when etching occurs, the DBR structure is already protected by the intermediary layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method ensures precise control over etch processes, reducing over-etching to less than 2 nm and achieving uniformity across the wafer scale, thereby maintaining the optical performance and consistency of LCoS back-planes.
Implementation Method 1
The stopping layer may be or include an etch-stop material. The etch-stop material may be selected to generate, during the etching of the pixel isolation bilayer, an optical emission spectroscopy (OES) signal of the etch-stop material different from an OES signal of the high-k layer.
Implementation Method 2
The diffusion barrier material may be selected to provide a barrier to diffusion of oxygen into the semiconductor substrate while etching the pixel isolation bilayer.
Implementation Method 3
The diffusion barrier material may be selected to provide a barrier to diffusion of atoms from the semiconductor substrate into the high-k layer while forming the lithographic mask.
Data Source
AI summary
Processing methods may be performed to form a pixel isolation structure on a semiconductor substrate. The method may include forming a pixel isolation bilayer on the semiconductor substrate. The pixel isolation bilayer may include a high-k layer overlying a stopping layer. The method may include forming a lithographic mask on a first region of the pixel isolation bilayer. The method may also include etching the pixel isolation bilayer external to the first region. The etching may reveal the semiconductor substrate. The etching may form the pixel isolation structure.