Bilayer SAC Cap Structure for Gate Height Preservation
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Solution Overview
Problem
Tall gate structures in semiconductor devices lead to gate collapse, hugging gates, active hole, and gate cut tip-to-tip shorts, along with significant gate height loss due to trench silicide reactive-ion etching and chemical-mechanical planarization, necessitating a method to prevent cap material and spacer erosion during subsequent etching processes.
Innovation Solution
A bilayer self-aligned contact (SAC) cap is formed using interlocking SiN U-shaped and oxide T-shaped structures, which includes forming a nitride liner, an amorphous silicon layer, and an oxide layer to prevent erosion during trench silicide and contact etch stop layer reactive-ion etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single-layer nitride cap is formed over recessed gate structures, then the gate structures are protected to some extent, but the cap material and spacer erosion occurs during TS and CESL RIE processes
Solution Approach 1:
The patent applies a bilayer cap structure comprising a nitride layer and an oxide layer. The nitride layer provides erosion resistance during RIE processes, while the oxide layer provides additional protection and planarization benefits. This composite structure effectively prevents both cap material and spacer erosion that occur with single-layer caps.
Solution Approach 2:
The cap structure is segmented into two distinct functional layers: a nitride layer specifically designed to resist erosion during RIE processes, and an oxide layer that provides additional protection and enables better planarization. Each layer performs its specific function to collectively solve the erosion problem.
2Reliability
If tall gate structures are used to reduce horizontal resistance, then resistance is improved, but gate collapse, hugging gates, and active hole issues occur
Solution Approach 1:
The bilayer cap structure is formed before the TS and CESL RIE processes to provide preliminary protection to the gate structures. This pre-formed protective layer prevents the gate collapse, hugging gates, and active hole issues that would otherwise occur during the etching processes.
Solution Approach 2:
The nitride and oxide layers act as a cushioning protective barrier formed beforehand to absorb and distribute the mechanical and chemical stresses during RIE processes, preventing gate structure instability while maintaining the tall gate structure needed for low resistance.
3Ease of manufacture
If TS RIE and TS CMP are performed to form trench silicide, then contact formation is enabled, but more than 35 nm of gate height loss occurs
Solution Approach 1:
The bilayer cap structure with nitride and oxide layers provides enhanced protection during TS RIE and TS CMP processes. The nitride layer resists erosion during RIE, while the oxide layer provides protection during CMP, collectively reducing gate height loss to below 35 nm while enabling proper contact formation.
Solution Approach 2:
The protective bilayer cap is formed in advance before TS RIE and TS CMP processes to preserve gate height. This preliminary protective structure prevents excessive material removal during these critical manufacturing steps, maintaining gate height budget while enabling contact formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The bilayer SAC cap effectively prevents cap material and spacer erosion, improves within-die uniformity, and reduces gate height budget, thereby minimizing issues like gate collapse and shorts, enhancing the fabrication of semiconductor devices at the 7 nm technology node and beyond.
Implementation Method 1
forming a nitride liner over portions of the substrate and along sidewalls of each gate structure... forming an oxide layer over portions of the oxide liner... to prevent erosion during trench silicide and contact etch stop layer reactive-ion etching
Implementation Method 2
trench silicide and contact etch stop layer reactive-ion etching
Implementation Method 3
trench silicide (TS) reactive-ion etching (RIE) selectivity and TS chemical-mechanical planarization (CMP)
Data Source
AI summary
Methods of forming a SAC cap with SiN U-shaped and oxide T-shaped structures and the resulting devices are provided. Embodiments include forming a substrate with a trench and a plurality of gate structures; forming a nitride liner over portions of the substrate and along sidewalls of each gate structure; forming an ILD between each gate structure and in the trench; recessing each gate structure between the ILD; forming a U-shaped nitride liner over each recessed gate structure; forming an a-Si layer over the nitride liner and the U-shaped nitride liner; removing portions of the nitride liner, the U-shaped nitride liner and the a-Si layer; forming a W layer over portions of the substrate adjacent to and between the a-Si layer; forming an oxide liner over the nitride liner, the U-shaped nitride liner and along sidewalls of the W layer; and forming an oxide layer over portions of the oxide liner.