Binarized RF Receiving Circuit for Massive-MIMO Size Reduction
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Solution Overview
Problem
Existing receiving circuits in radio communication systems, particularly those using Massive-MIMO techniques, face challenges in preventing circuit size and power consumption increases due to the need for analog processing circuits like mixers, local oscillators, and multi-bit AD converters.
Innovation Solution
A receiving circuit that extracts and binarizes the amplitude and phase components of RF signals, generating a digital RF signal without the need for mixers, local oscillators, or multi-bit AD converters, using envelope and phase signal generating units to produce binarized signals processed by digital circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If analog processing circuits (mixer, local oscillator, multi-bit AD converter) are provided in the receiving circuit, then the receiving function can be achieved, but the circuit size increases
Solution Approach 1:
The patent replaces the mechanical/analog processing system (mixer, local oscillator, multi-bit AD converter) with a digital processing system. The envelope detection unit detects envelope information digitally, the phase extraction unit extracts phase information through digital processing, and the 1-bit AD converter converts the RF signal to a 1-bit digital signal. This substitution eliminates the need for complex analog circuits, thereby reducing circuit size while maintaining receiving functionality.
Solution Approach 2:
The patent changes the parameter of signal representation from analog continuous values to digital 1-bit values. By converting the RF signal to a 1-bit digital signal through the 1-bit AD converter and processing envelope and phase information digitally, the system achieves receiving functionality with significantly reduced circuit complexity and size compared to traditional analog processing circuits.
2Reliability
If analog processing circuits (mixer, local oscillator, multi-bit AD converter) are provided in the receiving circuit, then the receiving function can be achieved, but power consumption increases
Solution Approach 1:
The patent replaces power-hungry analog processing circuits (mixer, local oscillator, multi-bit AD converter) with low-power digital processing circuits. The envelope detection, phase extraction, and 1-bit AD conversion are all implemented using digital logic, which consumes significantly less power than analog circuits. This substitution maintains receiving functionality while dramatically reducing power consumption.
Solution Approach 2:
The patent changes the signal processing approach from analog to digital domain, specifically using 1-bit quantization. This parameter change allows the use of simple digital logic circuits instead of complex analog circuits, resulting in reduced power consumption while preserving the essential receiving function through digital envelope detection and phase extraction.
3Measurement precision
If high-speed AD conversion is used to maintain signal quality, then SNR characteristics are maintained, but circuit complexity and size increase
Solution Approach 1:
The patent changes the quantization parameter from multi-bit to 1-bit, which simplifies the AD converter circuit significantly. By processing envelope information and phase information separately through digital circuits, the system maintains SNR characteristics without requiring high-speed multi-bit AD conversion, thereby reducing circuit complexity.
Solution Approach 2:
The patent segments the signal processing into separate functional units: envelope detection unit, phase extraction unit, and 1-bit AD converter. This segmentation allows each unit to be optimized independently, with the 1-bit AD converter requiring minimal circuit complexity while the digital processing units maintain signal quality and SNR characteristics through coordinated processing.
Data Source
AI summary
According to an embodiment, a receiving circuit includes an envelope signal generating unit configured to output an envelope signal of a received RF signal, an amplitude signal generating unit configured to binarize the envelope signal which is captured in synchronization with a reference clock signal and output the binarized envelope signal as an amplitude signal, and a phase signal generating unit configured to binarize a phase component of the RF signal and output the binarized phase component as a phase signal, in which a digital RF signal is generated based on the amplitude signal and the phase signal.