Binary Box Particle Filtering for FPGA Navigation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current regularized box particle filtering methods require significant computational resources, making them incompatible with implementation on field-programmable gate array (FPGA) circuits, which are necessary for autonomous vehicle navigation, particularly for correcting inertial drift in aircraft navigation.

Innovation Solution

A modified box particle filtering method that calculates the estimate of Xα using binary representation, allowing for reduced computational requirements and enabling implementation on FPGA circuits, including steps for predicting and updating state intervals with probabilistic weights.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If regularized box particle filtering method is used for autonomous navigation, then navigation accuracy is improved, but computational resource requirements increase

Engineering Contradiction:
Improvenavigation accuracyVSAvoidcomputational resource requirements
Core Design Contradiction:
Measurement precisionVSPower

Solution Approach 1:

The patent segments the calculation of X^α into binary representation operations, dividing the complex mathematical computation into manageable bitwise operations that can be efficiently executed on FPGA circuits

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent replaces traditional floating-point arithmetic mechanical operations with binary representation and bitwise operations, enabling implementation on digital FPGA circuits rather than requiring high-performance general-purpose processors

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If regularized box particle filtering method is implemented, then inertial drift correction is improved, but device complexity increases

Engineering Contradiction:
Improveinertial drift correctionVSAvoidcomputational algorithm complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the complex particle filtering algorithm into discrete state intervals and binary operations, making the algorithm structure more suitable for systematic implementation on FPGA circuits

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the computational parameters from continuous floating-point arithmetic to discrete binary representation, fundamentally altering how the algorithm is executed and reducing implementation complexity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4073465B1Particle filtering method and navigation system using measurement correlation
Publication Date: 2024.11.20 OFFICE NAT DETUDES & DE RECH AEROSPATIALES
  • EP4073465B1 patent drawingFigure 1
  • EP4073465B1 patent drawingFigure 2
  • EP4073465B1 patent drawingFigure 3

AI summary

A box regularized particle filtering method implements a binary representation of numbers. This implementation can be used to determine a box division coordinate and/or to modify state intervals according to a fixed probability kernel, for example according to an Epanechnikov kernel. The method can be executed autonomously within a navigation system using measurement correlation (10), in particular on board an aircraft (20) such as an aeroplane, a flying drone or any self-propelled airborne vehicle.