Binary Convolution Processing With Sign-Based Partial-Sum Inversion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Convolution neural networks (CNNs) require significant computational resources, and existing methods to separate multiplication and addition operations do not optimize energy efficiency.
Innovation Solution
A convolution processing method involving binary multiplication of input feature values by weight values, inverting partial sums based on sign bits, expanding sequences to match predicted bitwidth, and using a compressor tree circuit to sum additional bits and remaining partial sums, with optional sign-extension for biases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conventional multiplication and addition separation methods are used, then computational simplicity is improved, but energy efficiency deteriorates
Solution Approach 1:
The patent changes the parameter representation from conventional decimal numbers to binary form, and changes the computation method to use shift operations instead of traditional multiplication. This transforms the computational approach to achieve both simplicity and energy efficiency by leveraging the properties of binary arithmetic and bit-shifting operations.
Solution Approach 2:
The patent replaces the mechanical multiplication operation with a combination of shift operations and addition operations. By substituting the complex multiplication mechanism with simpler shift-and-add operations, the system achieves reduced computational complexity and lower energy consumption while maintaining equivalent mathematical functionality.
2Use of energy by stationary object
If the number of flip-flops and adders is reduced, then power consumption and area requirements are improved, but computational accuracy may deteriorate
Solution Approach 1:
The patent segments the computational process into multiple stages: first computing partial products using simplified operations, then accumulating these partial products through addition. This segmentation allows the use of fewer flip-flops and adders in each stage while maintaining overall computational accuracy through systematic accumulation of results.
Solution Approach 2:
The patent performs preliminary computation of partial products before final accumulation. By pre-computing the individual multiplication results and storing them temporarily, the system can then sum these pre-computed values using simpler addition operations, reducing the need for complex simultaneous computation and lowering power consumption.
Data Source
AI summary
A convolution processing method performed by at least one processor included in an electronic apparatus, including: obtaining a plurality of partial sums by multiplying a plurality of input feature values in a binary form by a plurality of weight values in the binary form; inverting a plurality of first partial sums from among the plurality of partial sums, wherein the plurality of first partial sums correspond to results obtained by multiplying each input feature value from among the plurality of input feature values by a sign bit corresponding to each weight value from among the plurality of weight values; and obtaining an output feature value based on the inverted first partial sums, additional bits, and remaining partial sums other than the inverted first partial sums.