Binary Debug Logging With Per-Core Cyclic Buffers
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Solution Overview
Problem
The development and maintenance of complex systems require strong debugging capabilities that provide fine-grained information, but this often compromises system performance and storage capacity.
Innovation Solution
A method that generates debug messages in a binary format with debug header information and optional parameters, allocated to separate cyclic buffers for each processor core, allowing classification into different channels based on retention time and usage, with optional decoding to human-readable text on demand.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fine-grained debug information is constantly provided, then debugging capability is improved, but system performance and storage capacity are compromised
Solution Approach 1:
The system divides debug information into different channels (volatile and persistent) based on retention requirements, and allocates separate cyclic buffers for each processor core. This segmentation allows the system to collect detailed debug information without overwhelming the entire system, as each core has its own dedicated buffer space.
Solution Approach 2:
The patent changes the format parameter from traditional text-based logging to binary format, which significantly reduces storage requirements and transmission overhead. Additionally, the system dynamically adjusts retention time parameters by implementing both volatile (short-term) and persistent (long-term) channels, allowing fine-grained control over how long debug information is retained based on its importance.
2Reliability
If fine-grained debug information is constantly provided, then debugging capability is improved, but storage capacity is compromised
Solution Approach 1:
The system segments storage into volatile and persistent channels, with each processor core having its own cyclic buffer. This segmentation allows efficient use of storage capacity by retaining only necessary information in each segment, rather than storing all possible debug data uniformly.
Solution Approach 2:
The patent changes the data format from text to binary, which compresses the storage requirement for debug information. The system also implements circular buffering with configurable retention periods, allowing storage capacity to be optimized by overwriting old data in volatile channels while preserving important data in persistent channels.
3Reliability
If debug information is retained for long history, then defect detection capability is improved, but memory footprint increases
Solution Approach 1:
The system segments long-term retention into persistent channels while using volatile channels for short-term data. Each processor core has its own cyclic buffer that can be configured for different retention durations, allowing the system to maintain long history for critical defects while keeping overall memory footprint controlled through selective retention.
Solution Approach 2:
The patent implements configurable retention time parameters that allow the system to optimize between history length and memory usage. By using binary format instead of text, the same memory footprint can store significantly more debug events, effectively extending the retainable history period without proportionally increasing memory requirements.
Data Source
AI summary
A method, computer program product, and computer system for generating, by a computing device, a debug message of a plurality of debug messages, wherein a format of the debug message may be a binary format that includes information, and wherein the information may include debug header information and one or more values of optional parameters. It may be determined that the debug message and a portion of the plurality of debug messages are associated with one or more debug levels. Each respective processor core may be allocated with a separate cyclic buffer that contains the information for each of the debug messages that are associated with the one or more debug levels and written while each respective processor core is active.