Binary Decision Tree Arbiter for Shared Resource Arbitration
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Solution Overview
Problem
Existing arbitration schemes in computer systems face inefficiencies as the number of requestors increases, leading to delays and reduced throughput due to the complexity of determining which requests to grant in each clock cycle, especially when not all requestors submit requests simultaneously.
Innovation Solution
A method using a binary decision tree to generate a one-hot vector, where each bit represents a requestor, with select signals determining which bits to set to zero, resulting in a vector granting access to the shared resource to the corresponding requestor for the current processing cycle, implemented in hardware logic to optimize arbiter performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a round robin arbitration scheme is used to ensure fair access for all requestors, then all requestors are granted access over time, but the delay increases and throughput decreases as the number of requestors increases
Solution Approach 1:
The system pre-calculates and stores priority values for each requestor before arbitration is needed. When arbitration occurs, these pre-computed priorities are immediately used to select the winning requestor, eliminating the need for complex real-time calculations and reducing arbitration delay while maintaining fairness through the pre-established priority scheme
Solution Approach 2:
The patent uses a priority encoder that converts multiple request signals into a single priority-based selection signal. This encoding process creates a compact representation of the arbitration decision that can be quickly decoded and executed, reducing the time complexity of the arbitration process while preserving the fair access guarantee
2Productivity
If the arbitration scheme complexity is increased to handle more requestors efficiently, then throughput may improve, but hardware size and compile time increase
Solution Approach 1:
The arbitration logic is segmented into distinct functional modules: requestor priority assignment units, a priority encoder, and a grant signal generator. Each module handles a specific aspect of the arbitration process, allowing for independent optimization and reducing overall hardware complexity while maintaining high throughput capability
Solution Approach 2:
The system changes the parameter representation from binary request codes to priority-encoded values. By assigning priority levels to requestors and using these priorities as the selection criterion, the arbitration process becomes simpler and faster, reducing hardware complexity while improving throughput
Data Source
AI summary
Methods of arbitrating between requestors and a shared resource are described. The method comprises generating a vector with one bit per requestor, each initially set to one. Based on a plurality of select signals (one per decision node in a first layer of a binary decision tree, where each select signal is configured to be used by the corresponding decision node to select one of two child nodes), bits in the vector corresponding to non-selected requestors are set to zero. The method is repeated for each subsequent layer in the binary decision tree, based on the select signals for the decision nodes in those layers. The resulting vector is a priority vector in which only a single bit has a value of one. Access to the shared resource is granted, for a current processing cycle, to the requestor corresponding to the bit having a value of one.