Binary Emulation Metadata for Memory Ordering Constraints

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Solution Overview

Problem

Binary emulation faces challenges when emulating execution of a binary compiled for a strongly-ordered ISA on a target processor with a weakly-ordered ISA, as compilers rely on inherent acquire/release semantics, leading to loss of memory ordering constraints and unnecessary emission of memory barriers, which harms performance and increases instruction count.

Innovation Solution

Generating metadata during compilation to capture developer-specified memory ordering constraints, allowing the emulator to enforce these constraints during emulation on the target processor, thereby reducing unnecessary memory barriers and improving performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If compilers rely on inherent acquire/release semantics of strongly-ordered ISA machine code instructions, then the binary can be compiled and executed directly on the original processor, but the explicit memory ordering constraints are lost when emulating on a weakly-ordered ISA processor

Engineering Contradiction:
Improvememory ordering constraint preservationVSAvoidmemory ordering constraints
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The compiler performs preliminary analysis of source code annotations (such as volatile qualifiers and memory ordering intrinsics) during the compilation phase, identifies instructions that require memory ordering constraints, and embeds this information into the generated binary in a format accessible to the emulator. This preliminary capture of ordering constraint information enables the emulator to enforce appropriate memory barriers when translating to weakly-ordered ISA, preventing the loss of memory ordering semantics that would otherwise occur during binary emulation.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the emulator emits memory barriers for all memory operations to preserve ordering constraints, then memory ordering correctness is maintained, but the number of instructions increases and performance decreases

Engineering Contradiction:
Improvememory ordering correctnessVSAvoidemulation performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

Instead of uniformly applying memory barriers to all memory operations during binary emulation, the emulator uses the embedded metadata from the compiled binary to identify specifically which instructions require memory ordering constraints. The emulator then emits memory barriers only for those particular instructions that have associated ordering constraint information, while allowing other memory operations to execute without barriers. This selective, localized application of memory barriers maintains correctness for critical operations while minimizing the performance overhead associated with barrier emissions.

Inventive Principle:
Principle #3Local quality

3Reliability

If the emulator emits memory barriers for all memory operations to ensure correctness on weakly-ordered ISA, then memory ordering is preserved, but the translated binary size increases

Engineering Contradiction:
Improvememory ordering preservationVSAvoidtranslated binary size
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The emulator leverages the pre-computed metadata embedded in the binary to apply memory barriers only locally at specific instruction points that require ordering constraints, rather than globally inserting barriers throughout the entire translated binary. This selective approach ensures that memory ordering is preserved where necessary while avoiding the proliferation of unnecessary barrier instructions that would inflate the translated binary size.

Inventive Principle:
Principle #3Local quality

4Reliability

If the compiler generates metadata capturing memory ordering constraints, then the emulator can enforce constraints granularly, but the compilation process becomes more complex

Engineering Contradiction:
Improveconstraint enforcement capabilityVSAvoidcompilation process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The compiler performs preliminary analysis of source code annotations (such as volatile qualifiers and memory ordering intrinsics) during the compilation phase, identifies instructions that require memory ordering constraints, and embeds this information into the generated binary in a format accessible to the emulator. This preliminary capture of ordering constraint information enables the emulator to enforce appropriate memory barriers when translating to weakly-ordered ISA, preventing the loss of memory ordering semantics that would otherwise occur during binary emulation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The compiled binary serves as an intermediary carrier that transports memory ordering constraint information from the compilation phase to the emulation phase. The compiler embeds metadata about which instructions require ordering constraints into the binary, and the emulator reads this metadata to determine where to emit memory barriers. This intermediary mechanism allows the compiler to capture constraints without directly managing the emulation process, while still enabling precise constraint enforcement during emulation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11379195B2Memory ordering annotations for binary emulation
Publication Date: 2022.07.05 MICROSOFT TECHNOLOGY LICENSING LLC
  • US11379195B2 patent drawing
  • US11379195B2 patent drawing
  • US11379195B2 patent drawing

AI summary

During source code compilation to a first processor instruction set architecture (ISA), a compiler encounters a memory ordering constraint specified in the source code. The compiler generates binary emulation metadata that is usable during emulation of emitted machine code instructions of the first ISA, in order to enforce the memory ordering constraint within corresponding machine code instructions of a second ISA. An emulator utilizes this binary emulation metadata during emulation of a resulting executable image at a processor implementing the second ISA. When the emulator encounters a machine code instruction in the image that performs a memory operation, it identifies an instruction memory address corresponding to the instruction. The emulator determines whether the binary emulation metadata identifies the instruction memory address as being associated with a memory ordering constraint. If so, the emulator emits machine code instruction(s) in the second ISA that perform the memory operation using a memory barrier.