Hierarchical Binary Hashing for Balanced Strided Memory Access

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Solution Overview

Problem

Existing memory systems suffer from imbalanced memory requests across channels and banks due to excessive contention under certain workload conditions, which existing hashing schemes fail to entirely eliminate.

Innovation Solution

A hierarchical binary hash function is employed to evenly distribute strided workloads across memory banks and channels, using XOR trees to model the hash behavior efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If permutation-based mapping scheme (hashing) is used to randomize memory accesses, then spatial locality is partially improved, but imbalanced memory requests across channels and banks still occur under certain workload conditions

Engineering Contradiction:

Improvememory access balanceVSAvoidcontention on specific banks

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent segments the memory address space into multiple regions and applies different hashing functions to different regions. This segmentation prevents strided workloads from consistently hashing to the same bank, as different regions use different hash functions that distribute accesses more evenly across all banks and channels.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the parameters of the hashing function dynamically based on the workload type. By detecting strided access patterns and switching to a different hashing function with modified parameters, the system adapts to eliminate the imbalance that standard hashing creates under specific workload conditions.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If hierarchical binary hash function is used to distribute strided workloads, then memory access distribution is improved, but system complexity increases

Engineering Contradiction:

Improveeven distribution of memory accessesVSAvoidhash function implementation

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a hierarchical hashing structure where multiple levels of hashing functions are nested. The first hash function distributes accesses at a coarse level, and subsequent hash functions refine the distribution at finer granularities. This nested approach achieves even distribution while keeping each individual hashing function relatively simple.

Inventive Principle:

Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent introduces an additional dimension to the hashing process by using multiple hashing functions in sequence rather than a single complex function. This multi-dimensional approach distributes workloads across banks and channels more effectively while maintaining simplicity at each hashing level.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12566701B2Evenly distributing hierarchical binary hashes for strided workloads

Publication Date: 2026.03.03 INTEL CORP

AI summary

Described herein is a computer memory system comprising a plurality of memory banks or other memory structures and circuitry configured to implement a hash function that produces output values that evenly distribute strided memory accesses across the plurality of memory structures. The memory banks can be cache memory banks that may include a plurality of cache lines, cache sets, or cache ways. The memory banks can also be DRAM memory banks accessed through different memory channels. The hash function facilitates the even distribution across memory structures in the face of a plurality of different strided memory access patterns.