Binary Logic Circuit for Function Approximation
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Solution Overview
Problem
Existing hardware implementations for approximating functions like log and gamma functions suffer from poor accuracy and high resource consumption, with conventional methods such as the Mitchell approximation being inaccurate and look-up table approaches requiring large memory and complex hardware.
Innovation Solution
A binary logic circuit that approximates mathematical functions over a predefined range using a series of linear segments with fixed gradients and base values, implemented using binary and trinary representations to minimize the number of adders required, allowing for efficient hardware implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a look-up table approach is used to improve accuracy, then measurement precision is improved, but device complexity and area consumption increase
Solution Approach 1:
The function approximation is divided into multiple linear segments, each covering a specific sub-range of the input domain. This segmentation allows the use of a smaller lookup table with fewer entries while maintaining overall accuracy through piecewise linear approximation. The lookup table stores only the breakpoint values and corresponding function values, reducing memory requirements compared to storing the entire function curve.
Solution Approach 2:
Different regions of the function domain are handled with different approximation qualities. The lookup table approach provides high accuracy at breakpoint regions while linear interpolation provides sufficient accuracy in between breakpoints. This local differentiation of approximation quality allows reduced overall memory consumption while maintaining acceptable precision across the entire domain.
2Productivity
If a multiplication array is used to perform multiplication of two variables, then productivity is improved, but device complexity and area consumption increase
Solution Approach 1:
The multiplication operation is extracted and simplified by pre-computing and storing gradient values in the lookup table. During runtime, only simple multiplication by stored gradient values is needed instead of complex multiplication arrays. This extraction of computational complexity into the lookup table phase reduces runtime hardware complexity while maintaining calculation speed.
Solution Approach 2:
The gradient values for linear segments are pre-computed and stored in the lookup table during system initialization or design time. This preliminary action eliminates the need for complex multiplication arrays during actual function evaluation, as only simple multiplications by pre-stored gradients are required, significantly reducing hardware complexity while maintaining productivity.
3Measurement precision
If more adders are used in piecewise linear approximation, then measurement precision is improved, but device complexity increases
Solution Approach 1:
Instead of using a large number of adders to achieve high precision through fine-grained piecewise linear approximation, the patent uses a partial action approach with a lookup table that stores pre-computed gradient values. This allows achieving acceptable precision with fewer adders, as the heavy computational burden is shifted to the lookup table storage and retrieval operations rather than extensive adder chains.
Data Source
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AI summary
A binary logic circuit for approximating a mathematical function over a predefined range as a series of linear segments, each linear segment having one of a predetermined set of fixed gradients and a corresponding base value, the binary logic circuit comprising: an input for receiving an input variable in the predefined range; a plurality of logic chains each comprising: a binary multiplier adapted to perform multiplication by a respective one of the set of fixed gradients using h-1 binary adders, where h is the extended Hamming weight; and a binary adder adapted to add a base value to the input or output of the binary multiplier; and selection logic configured to select one of the logic chains in dependence on the input variable so as to provide, for the received input variable, an approximate value of the mathematical function.