Binary Neural Network Last Layer Conversion

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Solution Overview

Problem

Binary neural networks face challenges in maintaining accuracy while reducing memory and computation requirements, as binarization of weights and activation functions can lead to loss of information, particularly in convolutional neural networks where high input/output bandwidth is needed.

Innovation Solution

A binary neural network apparatus with a binarized last layer and a non-binary converter that converts the binarized bit sequence into non-binary data using predefined functions, lookup tables, or weighted sums, allowing for efficient memory use and maintaining accuracy through training based on loss functions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If binarization is applied to weights and activation functions in neural networks, then processing speed increases and memory capacity requirements decrease, but accuracy deteriorates due to information loss

Engineering Contradiction:
Improveprocessing speedVSAvoidaccuracy
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The neural network is segmented into different layers with different binarization strategies. The first layer and last layer maintain full-precision weights and activation functions, while intermediate layers use binarized weights and activation functions. This segmentation allows the network to benefit from fast binary operations in intermediate layers while preserving accuracy-critical operations in input and output layers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different parts of the neural network are assigned different precision characteristics. Specifically, the first layer and last layer use full-precision (non-binary) weights and activation functions to maintain high accuracy, while intermediate layers use binarized weights and activation functions to achieve high processing speed and low memory usage. This local differentiation of quality resolves the contradiction between speed and accuracy.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If binarization is applied to weights and activation functions in convolutional neural networks, then memory capacity requirements decrease, but input/output bandwidth requirements increase

Engineering Contradiction:
Improvememory capacityVSAvoidinput/output bandwidth
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The convolutional neural network is segmented into layers with different binarization characteristics. By maintaining full-precision operations in the first and last layers while using binary operations in intermediate layers, the system reduces overall memory capacity requirements while managing bandwidth requirements through efficient binary data transmission in intermediate layers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses binary representations (copies) of weight and activation function data in intermediate layers, which require significantly less memory capacity than full-precision representations. This copying approach with reduced precision achieves memory efficiency while the full-precision first and last layers ensure accurate input/output bandwidth processing.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20240412034A1Binary neural network apparatus and training method thereof
Publication Date: 2024.12.12 SAMSUNG ELECTRONICS CO LTD
  • US20240412034A1 patent drawing
  • US20240412034A1 patent drawing
  • US20240412034A1 patent drawing

AI summary

A binary neural network apparatus including a binarized last layer is provided. According to an embodiment of the present disclosure, the binary neural network apparatus includes: a binary neural network including a first layer, one or more second layers, and a third layer, wherein the one or more second layers are provided between the first layer and the third layer, and the third layer has binary input and binary weights and is configured to output a binarized bit sequence; and a non-binary converter configured to convert the binarized bit sequence into non-binary data and output the non-binary data.