Binary Neural Networks in Resistive Memory for In-Memory Multiplication

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Solution Overview

Problem

Implementing a convolutional neural network (CNN) with floating-point weights in memory is inefficient due to the large memory requirements and inability of memory cells to perform multiplication operations effectively.

Innovation Solution

Convert the CNN into a binary neural network (BNN) with binary weights {0,1} and {g1,g2}, which can be stored and processed in memory cells, allowing for efficient multiplication operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If a convolutional neural network with floating-point weights is implemented in memory, then the network can be processed in memory, but the memory requirements become excessively large and multiplication operations cannot be performed effectively

Engineering Contradiction:
Improvein-memory processing capabilityVSAvoidmemory requirements
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The patent applies parameter changes by transforming the weight representation from floating-point to binary format. This fundamental parameter change reduces the memory requirements from bytes to bits per weight, enabling efficient in-memory processing while dramatically reducing the quantity of memory resources needed.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the traditional digital multiplication operation with an analog current-based multiplication performed directly in the memory array. By utilizing the physical property of current flow through resistive memory cells, the system performs multiplication operations naturally during the read process, eliminating the need for separate computational units.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If floating-point weights are stored in memory cells, then the neural network maintains precision, but memory capacity is excessively consumed

Engineering Contradiction:
Improveweight precisionVSAvoidmemory capacity
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent changes the precision parameter from floating-point (typically 32-bit or 64-bit) to binary (1-bit), achieving a dramatic reduction in memory capacity requirements. This parameter change is compensated by using the physical state (presence or absence of current) to represent weight values, maintaining functional precision for neural network operations.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If traditional memory arrays are used for neural network computation, then data storage is achieved, but multiplication operations cannot be performed effectively

Engineering Contradiction:
Improvestorage efficiencyVSAvoidcomputational capability
Core Design Contradiction:
Quantity of substanceVSAdaptability or versatility

Solution Approach 1:

The patent makes the memory array universal by enabling it to perform both storage and computation functions simultaneously. The same memory cells that store weight data are also used to perform multiplication operations through current flow, eliminating the need for separate computational hardware and enabling in-memory processing.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent replaces digital computation logic with physical current-based multiplication. By utilizing the inherent electrical properties of resistive memory cells, multiplication operations are performed naturally during the read process, giving the memory array computational versatility while maintaining storage efficiency.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The BNN implementation reduces memory requirements and computational costs while enabling effective data processing using memory arrays.

Implementation Method 1

Each resistive memory cell of the resistive memory array is programmed to a respective one of a first binary weight state and a second binary weight state. The BNN can be executed by performing a plurality of multiplication operations using the resistive memory array and the plurality of binary inputs.

Methodology Applied
Scientific EffectResistive multiplication: Electrical Resistance

Data Source

PatentUS12443834B2Binary neural network in memory
Publication Date: 2025.10.14 MICRON TECHNOLOGY INC
  • US12443834B2 patent drawing
  • US12443834B2 patent drawing
  • US12443834B2 patent drawing

AI summary

Apparatuses and methods can be related to implementing a binary neural network in memory. A binary neural network can be implemented utilizing a resistive memory array. The memory array can comprise programmable memory cells that can be programed and used to store weights of the binary neural network and perform operations consistent with the binary neural network. The weights of the binary neural network can correspond to non-zero values.