Binary Processing Circuit with Mask Units for Speed and Area
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Solution Overview
Problem
Current processing circuits face challenges in increasing processing speed and reducing area while performing operations on binary numbers, particularly in obtaining output values efficiently from operands.
Innovation Solution
The processing circuit is configured with a high-order mask processing unit, a low-order mask processing unit, and an output synthesizing unit, which receive binary operands and generate mask bits to produce output values quickly, utilizing carry generating units and logical operations to simplify arithmetic expressions and reduce circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional processing circuits are used to perform binary number operations, then the circuit can perform the required processing functions, but the processing speed is limited and the circuit area is large
Solution Approach 1:
The processing circuit is divided into multiple dedicated units: a high-order mask processing unit for processing high-order bits, a low-order mask processing unit for processing low-order bits, and an output synthesizing unit for combining results. This segmentation allows parallel processing of different bit portions, increasing processing speed while keeping each unit's area manageable
Solution Approach 2:
The patent transforms the traditional sequential bit-processing approach into a parallel processing architecture by introducing mask processing units that operate on multiple bits simultaneously. The carry look-ahead mechanism processes carry bits in parallel across different bit positions, effectively adding a dimensional aspect to the processing that enables faster computation without proportionally increasing area
2Measurement precision
If complex arithmetic expressions are implemented in the processing circuit, then accurate computation is achieved, but the circuit area increases and processing speed decreases
Solution Approach 1:
The patent changes the computational parameters by pre-calculating and storing mask values in lookup tables. Instead of performing complex arithmetic operations in real-time, the circuit retrieves pre-computed mask values based on input patterns, maintaining computational accuracy while dramatically improving processing speed and reducing circuit complexity
Solution Approach 2:
The mask values and carry look-ahead tables are pre-computed and stored before the actual processing operation. This preliminary action allows the main processing circuit to simply retrieve and combine these pre-computed values rather than performing complex calculations during operation, thereby improving processing efficiency without sacrificing accuracy
Data Source
AI summary
A processing circuit is configured to receive a first binary number composed of a plurality of bits and a second binary number composed of a plurality of bits, and with a digit of the most significant 1-valued bit in the first binary number composed of the plural bits being defined as a first bit digit and with a digit of a bit having a value of 1 first in a higher-order direction than the first bit digit in the second binary number composed of the plural bits being defined as a second bit digit, output a third binary number composed of a plurality of bits out of which a bit corresponding to the second bit digit has a value of 1 and other bits have values of 0, the processing circuit including: a high-order mask processing unit; a low-order mask processing unit; and an output synthesizing unit.