Binary Pulse Skipping Switching Regulator for Light Load Noise
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Solution Overview
Problem
Switching regulators experience noise and regulation issues due to fixed pulse-on time, leading to energy dissipation problems under light loading conditions, which existing methods like pulse frequency modulation and pulse skipping address inadequately by altering harmonic spectra unpredictably.
Innovation Solution
A circuit that senses output voltage increases under light loads and reduces switching frequency in a binary manner using a clock signal generator, frequency divider, and pulse generator to control the switching regulator, ensuring energy dissipation and harmonic spectrum stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If pulse frequency modulation is used to handle light loading conditions, then energy dissipation is improved, but the harmonic spectrum becomes unknown and uncontrolled
Solution Approach 1:
The patent implements dynamic pulse skipping control where the number of skipped pulses is adjusted in real-time based on the detected output voltage level. This dynamic adjustment allows the system to adapt to varying load conditions while maintaining predictable harmonic characteristics, resolving the contradiction between energy efficiency and spectral control.
Solution Approach 2:
The patent employs feedback control by continuously monitoring the output voltage and using this information to determine the appropriate pulse skipping pattern. This closed-loop approach ensures that energy dissipation is optimized while the harmonic spectrum remains predictable and controllable, as the skipping pattern is systematically determined rather than random.
2Loss of energy
If pulse skipping removes pulses from the switching waveform to reduce energy dissipation, then loss of energy is improved, but the harmonic spectrum changes unpredictably
Solution Approach 1:
The system dynamically adjusts the pulse skipping pattern based on real-time voltage detection, transitioning from fixed patterns to adaptive patterns that maintain spectral stability. This resolves the contradiction by making the skipping behavior responsive to actual operating conditions rather than following predetermined random patterns.
Solution Approach 2:
The patent changes the parameter of pulse skipping ratio based on detected voltage levels, creating a systematic relationship between voltage conditions and skipping patterns. This parameter change approach ensures that energy dissipation is reduced while the harmonic spectrum remains predictable, as the skipping pattern is determined by measurable physical parameters rather than randomness.
3Reliability
If the Pon time is fixed to avoid incorrect triggering, then reliability is improved, but energy dissipation worsens under light loading conditions
Solution Approach 1:
The patent implements periodic pulse skipping where pulses are removed at regular intervals based on detected voltage levels. This periodic action maintains the minimum Pon time requirement for reliable triggering while reducing the overall duty cycle under light load conditions, thereby decreasing energy dissipation without compromising triggering accuracy.
Solution Approach 2:
The system dynamically adjusts the switching frequency by skipping pulses only when voltage detection indicates light loading conditions. This dynamic approach maintains fixed Pon time for reliability during normal operation while reducing energy dissipation during light load periods, resolving the contradiction between reliability and energy efficiency.
Data Source
AI summary
In one embodiment, a circuit comprises a sense circuit configured to sense an increase in an output voltage of a switching regulator under a light load condition. A pulse generating circuit generates a control signal to switch on and off a voltage input to the switching regulator. The pulse generating circuit reduces in a binary manner a switching frequency of the control signal under the light load condition as the sensed output voltage increases. As the output voltage rises, a clock signal is divided by two to remove every second pulse and applied to the pulse generating circuit. Further increases in the output voltage cause divisions of the clock frequency by four to remove 3 of 4 pulses so that only every fourth pulse remains. With output voltage increases, the frequency is divided by eight to remove 7 of 8 pulses so that every eighth pulse remains, and so forth.