Binary Receiver Noise Immunity via Dual Amplifier Segmentation
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Solution Overview
Problem
Binary signal receivers, such as those compliant with the MIPI I3C standard, face errors due to signal reflections and glitches, especially at higher data rates, which can misinterpret signal transitions and introduce data errors.
Innovation Solution
A binary receiver architecture combines a fast amplifier with low hysteresis for speed and a slow amplifier with high hysteresis for noise rejection, using a state machine to filter glitches without significant data-propagation delay, by employing different hysteresis feedback transfer functions in both amplifiers to distinguish valid signal transitions from glitches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a fast amplifier with low hysteresis is used, then speed performance is improved, but noise immunity deteriorates
Solution Approach 1:
The receiver is segmented into two separate amplifier paths: a fast amplifier with low hysteresis for speed-critical signals and a slow amplifier with high hysteresis for noise filtering. Each amplifier processes the input signal independently, allowing the system to benefit from both fast response and noise immunity without requiring a single amplifier to compromise either attribute.
Solution Approach 2:
Different hysteresis characteristics are applied locally to different signal processing paths based on their specific requirements. The fast amplifier path uses low hysteresis for rapid response where speed is critical, while the slow amplifier path uses high hysteresis for noise rejection where stability is critical. This local differentiation allows each path to be optimized for its specific function.
2Object-affected harmful factors
If a slow amplifier with high hysteresis is used, then noise rejection is improved, but signal propagation delay increases
Solution Approach 1:
The receiver architecture segments the signal processing into two parallel paths with different hysteresis characteristics. The slow amplifier with high hysteresis handles noise filtering, while the fast amplifier with low hysteresis handles rapid signal transitions. This segmentation allows the system to achieve noise rejection without sacrificing overall response speed.
Solution Approach 2:
The fast amplifier acts as an intermediary that provides a low-hysteresis path for rapid signal response, compensating for the delay introduced by the slow amplifier's high hysteresis noise filtering. The combination of both amplifier paths through the state machine creates a balanced system that achieves both noise rejection and fast response.
3Reliability
If hysteresis feedback is applied to filter glitches, then error rate is reduced, but response time increases
Solution Approach 1:
The state machine receives inputs from both fast and slow amplifiers and segments the decision-making process into two paths. Valid signal transitions are detected through the fast amplifier path for rapid response, while the slow amplifier path provides hysteresis-based filtering for reliability. This segmentation allows the system to achieve both fast response and high reliability.
Solution Approach 2:
The system dynamically changes the effective hysteresis parameter based on the input signal characteristics. For rapid signal transitions detected by the fast amplifier, the effective hysteresis is low, enabling fast response. For potential noise or glitches detected by the slow amplifier, the effective hysteresis is high, providing filtering. This parameter adaptation allows the system to optimize both speed and reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively filters out glitches while maintaining fast response times, ensuring error-free data reception without introducing significant delays, thus improving the reliability and efficiency of binary signal reception.
Implementation Method 1
a first amplifier that amplifies the input signal and applies a first hysteresis feedback transfer function of an output of the first amplifier to the input signal
Implementation Method 2
a second amplifier that amplifies the input signal and applies a second hysteresis feedback transfer function of an output of the second amplifier to the input signal
Data Source
AI summary
A binary receiver combines a fast amplifier with a relatively slow amplifier for noise rejection. Both the fast and slow amplifiers employ hysteresis. The fast amplifier has relatively lower hysteresis, meaning that its sensitivity is a less effected by prior data values but more susceptible to glitch-induced errors. Conversely, the slow amplifier has relatively higher hysteresis and rejects glitches but introduces undesirable signal-propagation delays. A state machine taking input from both amplifiers allows the receiver to filter glitches without incurring a significant data-propagation delay.